Hewlett-Packard
9830
Computer
Schematic
Contents
Section Assemblies Page
Title & Contents (this page) - N1
Notes - N2
Block Diagram - N3
CPU Clock 12 P1
CPU Microcode Sequencing 13 P2
CPU Microcode Controls 13, 83 P3
CPU Registers 14, 83 P4
CPU ALU 14, 83 P5
M Register & Memory Cycle Generator 82 M1
T Register & Memory R/W Busses 83, 03 M2
ROM Bank Selection 82, 25, 03 M3
ROM Addressing 82, 25, 03 M4
BASIC ROM 21 M5
ROM Cards & Cartridges 26, (RC) M6
RAM Bank Selection & Addressing 82 M7
RAM 4K Assembly 84 M8
I/O State Machine & Flag Sense 11, 12 F1
I/O Flags & Register, 9866 Interface 11, 02 F2
I/O Busses 11, 02 F3
NOTE
This schematic has been derived through
examination of the equipment.
This is not the manufacturer’s schematic.
© bhilpert / 2013
Contents (continued)
Section Assemblies Page
Keyboard Logic 32 K1
Keyboard 31, 32 K2
Display Scan Logic 42 D1
Display Column Drivers 41 D2
Display Characters Left-16 41 D3
Display Characters Right-16 41 D4
Tape Interface 61, 62 T1
Tape Command Decode 62, 61 T2
Tape Drive 64, 65 T3
Tape Data Clock 62 T4
Tape Read/Write 63, 65, 66 T5
Tape Read 63 T6
Power Supply 51 S1
IC Units List - A1
IC Types List, Calculations - A2
Signal Names - A3
Memory Map, Timing Diagrams - A4
Board Layout - Backplane - L1
Board Layout - CPU & Memory - L2
Board Layout - Devices & Power Supply - L3
Connectors - CPU & ROMS - L4
Connectors - Power Supply & Memory - L5
Connectors - Devices - L6
HP 9830 Computer
Section: Title & Contents
Page: N1 Rendition: 2014 Dec 26
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