KD-LX330R/KD-LX110R
1-24
D/A
A/D
Servo control
ROM
RAM
Digital equalizer
automatic
adjustment circuit
Data
slicer
Sync signal
protection
EFM
VCO
CLV servo
PLL
TMAX
Sub code
decoder
Audio output
circuit
Digital output
16 k
RAM
Address
circuit
Correction
circuit
1-bit
DAC
PWM
Clock
generator
LPF
Micro-
controller
interface
DVss3 49
RO 50
DVDD3 51
DVR 52
LO 53
DVss3 54
ZDET 55
Vss5 56
BUS0 57
BUS1 58
BUS2 59
BUS3 60
BUCK 61
/CCE 62
/RST 63
VDD5 64
32 TEZI
31 TEI
30 SBAD
29 FEI
28 RFRP
27 RFZI
26 RFCT
25 AVDD3
24 RFI
23 SLCO
22 AVss3
21 VCOF
20 PVREF
19 LPFO
18 LPFN
17 TMAX
48 XVDD3
47 XO
46 XI
45 XVss3
44 TESIN
43 VDD3
42 Vss3
41 DMO
40 FMO
39 AVDD3
38 SEL
37 TEBC
36 RFGC
35 VREF
34 TRO
33 FOO
BCK 1
LRCK 2
AOUT 3
DOUT 4
IPF 5
VDD3 6
Vss3 7
SBOK 8
CLCK 9
DATA 10
SFSY 11
SBSY 12
/HSO 13
/UHSO 14
PVDD3 15
PDO 16
TC9490FA (IC521) : DSP
1. Pin layout & Block diagram
2. Pin function (1/2)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
I/O
O
O
O
O
O
-
-
O
O
O
O
O
O
Function
Bit clock output terminal
L/R channel clock output terminal
Audio data output terminal
Digital data output terminal
Correction flag output terminal
Digital 3.3V power supply voltage terminal
Digital GND terminal
Subcode Q data CRCC result output terminal
Subcode P-W data read clock I/O terminal
Subcode P-W data output terminal
Playback frame sync signal output terminal
Subcode block sync signal output terminal
Playback speed mode output terminal
Symbol
BCK
LRCK
AOUT
DOUT
IPF
VDD3
Vss3
SBOK
CLCK
DATA
SFSY
SBSY
/HSO
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
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