Notes
(Cont'd)
Privileged
Instructions
5.
The
high-order byte
(0-255)
in each Block Address Table word
specifies the
number
of
halfwords (1 to 256) to be loaded
from
the
block beginning
at
the
address specified by
the
low-order
three
bytes.
If
this
count is less
than
the
count contained
in
the
high-order
byte
of
the
general
register
specified by
R1
(translation
memory
block
size),
the
remaining
Translation
Table locations
of
the
speci-
fied block
are
loaded
with
zeros.
If
this
count is
greater
than
the
translation
memory block size count, loading is
terminated
by
the
block size count reaching zero.
6.
If
an
address
of
the Block Address Table specified by
the
general
register
designated by
R1
is
not
on a full word boundary,
an
Address-
ing
Interrupt
condition occurs. The operation is suppressed
with
the
operands unchanged.
7.
If
a location outside
the
available memory is addressed,
an
Address-
ing
Error
Interrupt
condition occurs. The operation is
terminated
with
unpredictable results.
8.
When
the
translation
memory
entry
is made
from
main
memory,
the
word is copied except
for
the
G-bit which is
unaltered
in
main
memory,
and
is
reset
to zero
in
the
translation
memory.
9.
The
format
of
the
halfword
in
main
memory
from
which
the
trans-
lation memory
entry
is copied
is:
WGUSEMXXXPPPPPPH
10. The
format
of
the
translation
memory
entry
is specified
under
the
Translation
Memory description
in
this
manual.
11.
If
the
block
address
specified in Block Address Table
entry
is
not
on a
halfword
boundary,
an
Addressing
Interrupt
condition occurs.
The
operation is
terminated
with
unpredictable results.
12.
If
this
Special
Function
is
attempted
under
any
of
the
following
conditions, a
Paging
Error
Interrupt
Condition occurs
and
the
Special
Function
is
terminated
with
unpredictable
results:
a.
If
either
the
address
of
the
Block Address Table
or
the
block
address
in
a Block Address Table
entry
specifies a nonexistent
translation
memory element (Le.,
the
two unused
bits
of
the
segment field
of
a
virtual
address
are
not
zeros).
b.
If
either
the
address
of
the
Block Address Table
or
the
block
address
in
a Block Address Table
entry
specifies a 2,048-byte page
in
the
high-order address
half
of
a 4,096-byte page.
13.
If
this
Special
Function
is
attempted
with
either
a Block
Address
Table
address
or
the
block
address
of
a Block Address Table
entry
specifying a non-utilizable page, a
Paging
Queue
Interrupt
condi-
tion occurs
and
the
instruction
is
terminated
with
unpredictable
results.
14. The contents
of
the
Translation
Table being loaded
in
the
trans-
lation
memory
do
not
cause a Paging Queue condition
or
Paging
Error
Interrupt
condition.
93
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