RX Family ADC Module Using Firmware Integration Technology
R01AN1666EJ0220 Rev. 2.20 Page 8 of 74
Dec 01, 2016
ADC_TRIG_SYNC_TRG0EN = 4, // MTU0 TRGE
ADC_TRIG_SYNC_TRG0FN = 5, // MTU0 TRGF
ADC_TRIG_SOFTWARE = 16 // software trigger; not for Group modes
// nor double trigger modes
// This is not set to TRSA or TRSB
} adc_trig_t;
typedef enum e_adc_add
{
ADC_ADD_OFF = 0, // addition is turned off for chans/sensors
ADC_ADD_TWO_SAMPLES = 1,
ADC_ADD_THREE_SAMPLES = 2,
ADC_ADD_FOUR_SAMPLES = 3
} adc_add_t;
typedef enum e_adc_align
{
ADC_ALIGN_RIGHT = 0x0000,
ADC_ALIGN_LEFT = 0x8000
} adc_align_t;
typedef enum e_adc_clear
{
ADC_CLEAR_AFTER_READ_OFF = 0x0000,
ADC_CLEAR_AFTER_READ_ON = 0x0020
} adc_clear_t;
typedef enum e_adc_speed
{
ADC_CONVERT_SPEED_NORM = 0x0000,
ADC_CONVERT_SPEED_HIGH = 0x0400
} adc_speed_t;
typedef struct st_adc_cfg
{
adc_add_t add_cnt;
adc_align_t alignment; // ignored if addition used
adc_clear_t clearing;
adc_speed_t conv_speed;
adc_trig_t trigger; // default and Group A trigger source
adc_trig_t trigger_groupb; // valid only for group modes
uint8_t priority; // for S12ADIO int; 1=lo 15=hi 0=off/polled
uint8_t priority_groupb; // GBADI interrupt priority; 0-15
} adc_cfg_t;
/* ADC_CONTROL() ARGUMENT DEFINITIONS */
typedef enum e_adc_cmd
{
// Commands for special hardware configurations
ADC_CMD_SET_SAMPLE_STATE_CNT,
// Commands to enable channels or sensors
ADC_CMD_ENABLE_CHANS, // enables chans and A & B INT if pri != 0
ADC_CMD_ENABLE_TEMP_SENSOR, // enables sensor and INT if priority != 0
ADC_CMD_ENABLE_VOLT_SENSOR, // enables sensor and INT if priority != 0
// Commands to enable hardware triggers or cause software trigger
ADC_CMD_ENABLE_TRIG, // ADCSR.TRGE=1 for sync/async triggers
ADC_CMD_SCAN_NOW, // software trigger start scan