Name: Samsung S3C2416
Brand: Samsung
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USER'S MANUAL

S3C2416

16/32-Bit RISC Microprocessor

August 2008

REV 1.00

Confidential Proprietary of Samsung Electronics Co., Ltd

Default Chapter2
- Important Notice2
- Revision History3
- Table of Contents5
Chapter 1 Product Overview29
- Introduction29
- Features30
- Block Diagram33
- Pin Assignments34
  - Signal Descriptions51
  - S3C2416 Operation Mode Description57
- Memory Map58
- Base Address of Special Registers59
Chapter 2 System Controller79
- Overview79
- Feature79
- Block Diagram80
- Functional Descriptions81
- Clock Management84
  - Clock Generation Overview84
  - Clock Source Selection84
- Main Oscillator Circuit Examples85
- Entering STOP Mode and Exiting STOP Mode (Wake-Up)95
- Entering SLEEP Mode and Exiting SLEEP Mode (Wake-Up)96
- Individual Register Descriptions100
Chapter 3 Bus Matrix & EBI119
- Overview119
- Special Function Registers120
Chapter 4 Bus Priorities123
- Overview123
Chapter 5 Static Memory Controller (SMC)125
- Read Timing Diagram (Drncs = 1, Drnowe = 1)129
- Write Timing Diagram (Drncs = 1, Drnowe = 0)133
  - Synchronous Write/ Synchronous Burst Write134
  - Bus Turnaround135
- Memory Interface with 8-Bit SRAM (2MB)137
Chapter 6 Mobile DRAM Controller145
- Memory Interface with 16-Bit SDRAM (4Mx16, 4Banks)148
- Memory Interface with 16-Bit Mobile DDR and DDR2149
- DRAM Timing Diagram150
Chapter 7 NAND Flash Controller159
- Overview159
- Features159
- Block Diagram160
- Boot Loader Function160
- GPC5/6/7 Pin Configuration Table in IROM Boot Mode161
- NAND Flash Memory Timing161
- NAND Flash Access162
- Data Register Configuration163
- Steppingstone (8KB in 64KB SRAM)163
- 1Bit / 4Bit / 8Bit ECC (Error Correction Code)163
- Memory Mapping(NAND Boot and Other Boot)168
- NAND Flash Memory Configuration169
- NAND Flash Controller Special Registers170
- Softlock and Lock-Tight178
Chapter 8 DMA Controller187
- Demand/Handshake Mode Comparison191
- Burst 4 Transfer Size192
Chapter 9 Interrupt Controller205
- Interrupt Group Multiplexing Diagram206
Chapter 10 I/O Ports235
- Overview235
- Port Control Descriptions242
- O Port Control Register243
- GPIO Alive & Sleep Part278
Chapter 11 Watchdog Timer279
- Overview279
  - Features279
- Watchdog Timer Operation280
- Watchdog Timer Special Registers282
Chapter 12 PWM Timer285
- Overview285
  - Feature285
- Bit PWM Timer Block Diagram286
  - PWM Timer Operation287
  - PWM Timer Control Registers296
Chapter 13 Real Time Clock (RTC)305
- Overview305
  - Features305
  - Real Time Clock Operation Description306
- RTC Tick Interrupt Clock Scheme309
Chapter 14 UART321
- Overview321
  - Features321
- Block Diagram322
  - UART Operation323
- UART AFC Interface324
- Interrupts in Connection with FIFO326
- Example Showing UART Receiving 5 Characters with 2 Errors327
- Irda Function Block Diagram328
- Serial I/O Frame Timing Diagram (Normal UART)329
- Clock, EPLL Speed Guide331
  - UART Special Registers332
Chapter 15 USB Host Controller345
- Overview345
- USB Host Controller Block Diagram345
  - USB Host Controller Special Registers346
Chapter 16 USB 2.0 Function347
- Overview347
  - Feature347
- Block Diagram348
- To Activate USB Port1 for USB 2.0 Function349
- SIE (Serial Interface Engine)350
- UPH (Universal Protocol Handler)350
- UTMI (USB 2.0 Transceiver Macrocell Interface)350
- USB 2.0 Function Controller Special Registers351
- Indexed Registers352
  - Registers353
- IN Transfer Operation Flow379
Chapter 17 IIC-Bus Interface381
- Overview381
- IIC-Bus Interface381
- IIC-Bus Block Diagram382
- Operations for Master/Receiver Mode388
- Operations for Slave/Transmitter Mode389
- Operations for Slave/Receiver Mode390
  - IIC-Bus Interface Special Registers391
Chapter 18 1 Introduction395
- Features395
- Color Format Conversion396
- Command FIFO397
- Rendering Pipeline398
  - Primitive Drawing398
- Transparent Mode400
- Color Expansion402
  - Rotation403
- Rotation Example404
Chapter 19 HS_SPI Controller433
- Overview433
- Features433
- Signal Descriptions434
- Operation434
- Special Function Register Descriptions437
  - Setting Sequence of Special Function Register437
  - Special Function Register438
Chapter 20 SD/MMC Host Controller447
- Overview447
- Features447
- Block Diagram448
- Sequence449
- Transaction Control with Data Transfer Using DAT Line Sequence (Using DMA)461
  - Abort Transaction462
  - SDI Special Registers463
- Determination of Transfer Type470
  - Command Register471
- Relation between Parameters and the Name of Response Type472
- Card Detect State480
- Timing of Command Inhibit (DAT) and Command Inhibit (CMD) with Data Transfer481
- The Relation between Command CRC Error and Command Timeout Error498
- The Relation between Command CRC Error and Command Timeout Error506
Chapter 21 LCD Controller522
- Features522
- Functional Description523
- BPP(1+5:5:5, BSWP/HWSWP=0) Display Types532
- BPP(5:6:5, BSWP/HWSWP=0) Display Types533
  - VD Signal Connection538
  - Palette Usage540
- BPP (A:6:6:6) Palette Data Format541
  - Window Blending542
    - Overview542
    - Blending Diagram/Details543
- Color Key Block Diagram544
- Color Key Function Configurations545
- LCD Signal Muxing Table (RGB and I-80 I/F)550
Chapter 22 ADC & Touch Screen Interface573
- Timing Diagram in Auto (Sequential) X/Y Position Conversion Mode576
Chapter 23 IIS Multi Audio Interface583
- IIS Audio Serial Data Formats588
- TX FIF0 Structure for BLC = 10 (24-Bits/Channel)593
- RX FIF0 Structure for BLC = 10 (24-Bits/Channel)596
  - IIS-BUS Interface Special Registers597
Chapter 24 AC97 Controller605
- Overview605
  - Feature605
  - Signals605
- AC97 Controller Operation606
  - Block Diagram606
  - Internal Data Path607
- Operation Flow Chart608
- AC-Link Digital Interface Protocol609
- AC97 Power-Down613
- Codec Reset614
- AC97 Controller State Diagram615
- AC97 Controller Special Registers616
Chapter 25 PCM Audio Interface621
- Overview621
  - Feature621
  - Signals621
- PCM Audio Interface621
- PCM Timing623
Chapter 26 Electrical Data639
- Absolute Maximum Ratings639
- Recommended Operating Conditions640
- C. Electrical Characteristics642
- Special Memory DDR I/O PAD DC Electrical Characteristics643
- USB DC Electrical Characteristics644
  - C. Electrical Characteristics645
- HCLK/CLKOUT/SCLK in Case that EXTCLK Is Used646
- Power-On Oscillation Setting Timing647
- Sleep Mode Return Oscillation Setting Timing648
- SMC Synchronous Read Timing649
- SMC Asynchronous Write Timing650
- SMC Wait Timing651
- Nand Flash Timing652
- SDRAM READ / WRITE Timing (Trp = 2, Trcd = 2, Tcl = 2, DW = 16-Bit)653
- DDR2 Timing654
- SDRAM MRS Timing655
- SDRAM Auto Refresh Timing (Trp = 2, Trc = 4)656
- External DMA Timing (Handshake, Single Transfer)657
- IIS Interface Timing (I2S Master Mode Only)658
- High Speed SDMMC Interface Timing659
- USB Timing (Data Signal Rise/Fall Time)660
- Clock Timing Constants661
- SMC Timing Constants662
- Memory Interface Timing Constants (SDRAM)663
- DMA Controller Module Signal Timing Constants664
- IIS Controller Module Signal Timing Constants(I2S Slave Mode Only)665
- High Speed SPI Interface Transmit/Receive Timing Constants666
- USB Electrical Specifications667
- USB Full Speed Output Buffer Electrical Characteristics668
- PCM Interface Timing669
Chapter 27 Mechanical Data671
- Package Dimensions671

Brand	Samsung
Model	S3C2416
Category	Computer Hardware
Language	English

Samsung S3C2416 User Manual

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