Circuit Description—475
Sawtooth Sweep Generator
Q920 and Q922 form a Miller Integrator circuit. When
the current through the Sweep Disconnect Amplifier Q904
is interrupted, the timing capacitance begins to charge
through the timing resistor. The timing resistor and
capacitance are selected by the A TIM E/D IV switch to
provide the various sweep rates listed on the instrument
front panel. The output signal at the collector of Q922 is a
negative-going sawtooth voltage waveform.
Sweep Start Amplifier
Just before the sweep starts to run down, the levels at
the bases of Q914 are approximately equal. When the
sweep starts to run down, the base of Q914B goes negative,
which increases the forward bias on CR914B. This in turn
decreases the forward bias on CR914A, which very shortly
after the start of the sweep, becomes reverse biased to
interrupt the current through Q914A. The circuit remains
in this condition until after the sweep retrace is complete.
When the circuit returns to quiescence, Q914A begins to
conduct through R904. This sets the current through Q904,
which in turn establishes the DC level starting point for the
sweep.
Output Buffer Amplifier
Q940 and Q956 form the Output Buffer Amplifier.
Q940 is an emitter follower and Q956 is a common-base
amplifier whose emitter is current-driven by the signal. The
Output Buffer Amplifier provides the output sawtooth
signal current to the Horizontal Amplifier and provides a
measure of isolation between the Sawtooth Generator and
the Horizontal Amplifier. Intensified Gain adjustment
R950 adjusts the gain of the stage to match the output
signal amplitude with that of the Non-Delaying Sweep
Generators.
The Delaying Sweep Output Buffer Amplifier passes
signal to the Horizontal Amplifier only when the HORIZ
DISPLAY switch is in the A INTEN position and the
TIM E/D IV switches are not in the X-Y position. When the
TIM E/D IV switches are in the X-Y position the anode of
CR956 is connected to +5 volts. This sets the base of Q956
at a positive enough level (about +6.3 volts in the A INTEN
position; about +8.5 volts in the A, M IX, and B DLY'D
positions) to reverse bias Q956 and prevent passage of the
Delaying Sweep signal to the Horizontal Amplifier. With
the TIM E/D IV switches not in the X-Y position and the
HORIZ DISPLAY switch in the A INTEN position R955 is
connected to —8 volts and the anode of CR956 is not
connected to any voltage. This forward biases CR955 and
sets the base of Q956 at a DC level of approximately +4.3
volts. Now Q956 is forward biased and the Delaying Sweep
signal is passed to the Horizontal Amplifier.
Logic Comparator
Q944 and Q946 are connected as a voltage comparator
and generate the logic pulses that signal the end of sweep
and blank the CRT display at the end of the sweep. Prior to
the generation of a sawtooth voltage waveform by the
Delaying Sweep Generator, the base of Q944 is at an
approximate —1.6 volt level. The base of Q946 is held at
about —3 volts by the divider made up of R948 and R949.
Therefore, Q946 is reversed biased and not conducting and
Q944 is forward biased and is conducting. Now, when the
sweep voltage at the emitter of Q940 begins to go in a
negative direction, the base of Q944 follows until the base
of Q944 goes more negative than the base of Q946. Q944
turns off and Q946 turns on, generating a positive pulse at
the collector of Q944 and a negative pulse at the collector
of Q946. The positive pulse at the collector of Q944 signals
the end of sweep and starts the holdoff period. The
negative pulse at the collector of Q946 signals the Z-Axis
Logic circuit to blank the CRT and prevent any further
display.
Delay Pickoff Comparator
The Delay Pickoff Comparator stage allows selection of
the amount of delay from the start of the Delaying Sweep
Generator before one of the Non-Delaying Sweep Genera
tors is turned on. The amount of delay available is variable
from 0.00 to 10.00 times the setting of the A TIM E/D IV
switch. The sweep rate of the Delayed (non-delaying)
Sweep Generator is determined by the setting of the B
TIM E/DIV switch.
Q926A and Q926B are connected as a voltage compa
rator. Q928 is a relatively constant current source for
Q926. Q938 is also connected as a voltage comparator
circuit and is used to improve the switching capabilities of
the stage. The reference voltage for the Delay Pickoff
Comparator stage is provided by DELAY-TIME POSITION
control R930. U930 is an integrated circuit containing two
high-gain amplifier cells used in a feedback amplifier
configuration. They provide accurate fixed voltages to both
ends of the DELAY-TIME POSITION control to allow
precise delay pickoff. The instrument is calibrated so that
the major dial divisions of the DELAY-TIME POSITION
control correspond to major divisions of horizontal de
flection on the CRT graticule. For example, if the
DELAY-TIME POSITION control is set to 5.00, the
Non-Delaying Sweep Generator is delayed five divisions of
the Delaying Sweep time before it can produce a sweep.
The sawtooth voltage waveform from the Delaying
Sweep Generator is connected to the gate of Q926B. The
quiescent level of the delaying sawtooth biases Q926B on
and its drain is negative enough to bias Q938B on. Q926A
and Q938A are off and not conducting. As the Delaying
Sweep sawtooth voltage goes down, the gate of Q926B also
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