RECEIVER
The input signal from the antenna is fed through
the low-pass filter, consisting of L
1
,
L213 , L214 ,
C
1
,
and
C243 —C245 ,
the diode changeover switch
D
206
—D207 ,
and
L
212
,
to the RF amplifier, Qi o
(3SK51). The amplified signal is then applied,
through a four-stage high-Q coaxial resonator
system, to the first mixer,
Q10
2
(3SK51). The use
of MOSFET components, in conjunction with the
high-Q resonator, minimizes the effects of inter-
modulation, as well as other spurious responses;
a low noise figure is also secured for the receiver
system.
The 144-148 MHz signal is heterodyned with the
local oscillator signal from the VCO circuit, pro-
ducing a 10.7 MHz first IF signal. The first IF
signal is fed through crystal filter XF101, which has
a passband of ± 7.5 kHz, to the second mixer,
Q103
(3SK4OM), resulting in a second IF of
455 kHz. The second local oscillator signal of
10.245 kHz is generated by
Q104
(2SC372Y).
Qios (25A564) works as a switch which dis-
connects the supply voltage to
Q104
when the
PLL circuit is unlocked.
The IF signal is amplified by
Q106 , Q107 ,
and
Q108
(2SC372Y), and Q109 (RC577H). Cascade-
connected ceramic filters
CF101
and
CF
I 02
provide
narrow band selectivity for the receiver, and the
limiting action of
Q109
removes any amplitude
variation in the IF signal, which is subsequently
fed to the discriminator, CD 101,
D106 ,
and
D107
(15188FM).
The discriminator produces an audio output in
response to a corresponding frequency shift in
the IF signal. The output audio signal is amplified
by
Q
113
and
Q
114
(2SC372Y), and applied across
volume control VR
1
to the input of audio ampli-
fier
Q
116
(µPC575C2). The output from
Q
116
in
series through the ACC socket to the internal
speaker. The low-pass filter between
Q
113
and
Q114
attenuates the audio spectrum above 3 kHz,
to increase readability of the incoming signal.
A portion of the 455 kHz IF signal is rectified by
D
103
and
D104 (1S188FM)
for S-meter indication.
VR101 is used to set the meter sensitivity.
When no carrier is present in the 455 kHz IF, the
high frequency noise at the discriminator output
is amplified by Quo and Qi (25C372Y), and
then detected by
D108
and
D
109
(15188FM),
producing a DC voltage. This voltage is then
applied to turn
Q1
12
(2SC372Y) ON. With the
conduction of Q112, the base of Q
11
3 is grounded,
squelching the audio amplifier. When a carrier is
present in the 455 kHz IF, the noise is removed
from the discriminator output, and the audio
amplifier recovers normal operation.
The opening of the squelch circuit causes
Q
113
to
conduct, causing lamp driver Q
115
(2SC372Y) to
draw current, lighting up the BUSY lamp. The
squelch controls, VR
2
and VR
1
0
2
, set the squelch
threshold level.
HETERODYNE OSCILLATOR
The heterodyne signal is generated by a Phase
Locked Loop (PLL) circuit, comprised of a VCO,
reference crystal oscillator, programmable divider,
and phase comparator.
The VCO transistor,
Q
301
(2SK19GR), generates
a signal of 133.3-137.3 MHz. The oscillator fre-
quency is controlled by varactor diode
D301
(1S2209), which varies the capacitance of a tuned
circuit consisting of
L301
5
TC301 ,
and
C
30
4 ,
in
accordance with a DC voltage supplied from phase
comparator
Q
309
(TC5081P).
The output signal from
Q3
0
1
is amplified by buffer
amplifier
Q302
(35K51-03). The signal is further
amplified by
Q303
(2SC535A), and fed through
diode switches
D302
and
D3
0
3
(151555), to the
transmitter and receiver mixers.
A portion of the output from
Q303
is fed through
buffer amplifier
Q304
(35K51-03) to PLL mixer
Q305
(25C535A), producing a 1-5 MHz PLL IF
signal, through mixing with the PLL heterodyne
signal. The latter signal is generated by an over-
tone crystal-controlled oscillator,
Q310
(25C372Y).
The amplified signal, is then fed to a programmable
divider,
Q308
(.11
3
C857C).
Crystal oscillator
Q312
(25C373) generates a
10.24 MHz signal, and its output is fed to scaler/
divider
Q308
(µPC857C), where the 10.24 MHz
signal is divided into a 10 kHz reference signal.
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