MASTR II

GE MASTR II User Manual

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LBI-4732

CIRCUIT

ANALYSIS

OPERATIONAL

AMP-

LIMITER

--~~----.-----~~------------------+-------------~4

13r-----------+-~--~----+-_.

______

._

__

_.

TX

AUDIO

LO

R20

40K

10

9

Rl9

40K

DECOUPLER NETWORK

TO

Cl50

POST-LIMITER

FILTER

04

AMPLIFIER

Rl7

Rl5

REG

+IOV

A-

RC-2668

Figure

4 -

Simplified

Audio

IC

FREQUENCY

DIVIDER

IC

The

output

at

pin

3

of

the

selected

ICOM

is

coupled

through

buffer

amplifier

QlOl

to

frequency

divider

UlOl,

which

di-

vides

the

oscillator

frequency

by

4.

The

divider

consists

of

two

J-K

flip-flops

con-

nected

as

a

binary

counter.

When

the

transmitter

is

not

keyed

(no

ICOMs

on),

QlOl

is

saturated

(turned

on)

with

its

collector

voltage

near

zero.

Key-

ing

the

transmitter

starts

one

of

the

ICOMs,

and

its

output

cuts

QlOl

on

and

off

once

each

cycle.

As

QlOl

turns

off

during

each

cycle,

the

drop

in

collector

voltage

causes

the

left

flip-flop

to

change

state.

Assume

the

flip-flop

was

in

the

"O"

state

(the

out-

put

at

"Q"

near

A-).

The

first

cycle

of

the

oscillator

output

causes

it

to

switch

to

the

"1"

stage

(output

at

"Q"

approximate-

ly

5

Volts).

The

second

cycle

will

cause

the

flip-flop

to

switch

back

to

the

"O"

state.

Therefore,

it

requires

two

oscilla-

tor

cycles

to

switch

the

left

flip-flop

through

one

complete

cycle

from

"O"

to

"1"

and

back

to

"0".

When

the

left

flip-flop

switches

from

"1"

to

"0",

it

causes

the

right

flip-flop

to

change

state.

It

requires

two

cycles

of

the

left

flip-flop

to

switch

the

right

flip-

flop

from

"O"

to

"1"

and

back

to

"0".

There-

fore,

four

cycles

of

the

oscillator

output

are

required

for

each

cycle

of

output

from

pin

9

of

UlOl.

If

UlOl

was

operating

into

a

pure

re-

sistive

load,

its

output

would

be

a

square

wave.

However,

the

modulator

circuit

pre-

4

sents

a

tuned

load

to

the

IC,

so

that

harmon-

ics

are

filtered

out

and

the

waveform

at

the

junction

of

Cl02

and

Cl03

(modulator

input)

is

essentially

a

sine

wave

at

one-fourth

the

oscillator

frequency.

The

output

of

the

fre-

quency

divider

is

coupled

through

DC

blocking

capacitor

Cl02

to

the

first

modulator

stage.

PHASE

MODULATORS,

AMPLIFIER & MULTIPLIERS

The

first

phase

modulator

is

varactor

(voltage-variable

capacitor)

CVlOl

in

series

with

tunable

coil

LlOl.

This

network

appeHrs

as

a

series-resonant

circuit

the

RF

output

of

the

oscillator.

An

audio

signal

applied

to

the

modulator

circuit

through

blocking

capacitor

Cll5

varies

the

bias

of

CVlOl,

re-

sulting

in

a

phase

modulated

output.

A

volt-

age

divider

network

(Rl08

and

Rl09)

provides

the

proper

bias

for

varactors

CVlOl,

CV102

and

CV103.

The

output

of

the

first

modulator

is

coupled

through

blocking

capacitor

Cl06

to

the

base

of

Class

A

amplifier

Ql02.

The

first

modulator

stage

is

metered

through

a

metering

network

consisting

of

Rll5,

Rl50,

Cl07

and

CRlOl.

Diodes

CR102

and

CR103

re-

move

any

amplitude

modulation

in

the

modula-

tor

output.

Following

Ql02

is

another

Class

A

Ampli-

fier,

Ql03.

The

output

of

Ql03

is

applied

to

the

second

modulator

stage.

The

second

modulator

consists

of

two

cascaded

modulator

circuits

consisting

of

CV102,

Ll02,

Ll03

and

CV103.

Following

the

second

modulator

is

a

Class

A

amplifier

Ql04.

The

output

of

the

second

modulator

stage

is

metered

through

•

•

•

Questions and Answers:

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GE MASTR II Specifications

General

Brand	GE
Model	MASTR II
Category	Two-Way Radio
Language	English

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