IBM Personal System/2 65 SX User Manual

Arbitration-Bus
Priority
Assignments
The
following
figure
shows
the
assignment
of
arbitration
levels.
The
functions
with
the
lowest
arbitration
level
have
the
highest
priority.
ARB Primary
Level Assignment
-2 Memory Refresh
-1 NMI
0
DMA
Channel
0
(Programmable
to
any
arbitration
level)
DMA Channel 1
DMA Channel 2
DMA Channel 3
DMA
Channel
4
(Programmable
to
any
arbitration
level)
DMA Channel 5
DMA Channel 6
DMA Channel 7
-E Available
System Microprocessor
TONOOAWHN
=
Figure
3-1.
Arbitration-Bus
Priority
Assignments
Note:
Devices
designed
for
arbitration
level
0
or
1
should
have
limited
bandwidth
or
short
bursts
so
diskette
overruns
can
be
prevented
or
recovered
by
retry
operations.
The
diskette-drive
controller
on
arbitration
level
2
can
be
held
inactive
by
devices
on
levels
0
and
1
by
a
refresh
operation,
and
by
the
previous
controlling
master.
The
diskette-drive
controller
should
not
be
held
inactive
for
more
than
12
microseconds
to
prevent
data
overruns.
Nonmaskable-interrupt
(NMI)
service
executes
at
a
priority
level
higher
than
0,
called
-1.
Memory
refresh
is
prioritized
at
-2,
two
levels
higher
than
0.
Levels
-1
and
-2
are
reached
on
the
system
board
only,
while
the
‘arbitrate/-grant’
signal
(ARB/-GNT)
is
in
the
arbitrate
state.
When
the
central-arbitration
contro!
point
receives
a
level
-1
request
(NMI,
a
system-board
internal
signal),
it
activates
-PREEMPT,
waits
for
the
end
of
transfer,
and
then
places
ARB/-GNT
in
the
arbitrate
state,
which
denies
channel
activity
to
arbitrating
devices.
The
central-arbitration
control
point
gives
the
grant
to
the
level
-1
request
and
holds
ARB/-GNT
in
the
arbitrate
state
until
the
operation
is
complete
and
the
NMI
service
is
reset.
3-4
Model
65
System
Board
—
October
1990

IBM Personal System/2 65 SX Specifications

General

Brand	IBM
Model	Personal System/2 65 SX
Category	Desktop
Language	English