LG FA162 - Block Diagrams

3-31 3-32
.%(%#87
5#0;12+0
5&4#/
/$
5GTKCN(NCUJ
/$
DB[0-15]
DMA[0-10]
12MHz
D+, D-
TUNER L/R
5(6(7
63,
$:
2+0
12 MHz
Interface
#&%
%5
3.3/5V
3.3/1.2V
3.3V
3.3V
SPI
I2C,RESET
CD_ADC_BCK ,
CD_ADC_LRCK,
CD_ADC_DATA
''241/
-$[VG
I2C
32.768kHz
I2C
3-wire
3.3V
3.3V
3.3V
3.3V
mvj|zVzslk
zwpukslV{yhjrpun
svhk
hSGiSGjSGkSGlSGm
/&
127
/QVQT+%
5
i|`\[Zr}G
wk
sk
mRVTSG{RVT
zslkRVT
zwpukslRVT
&'B',1B287
5(6(7
68%6<4%86<
5:
&'B0&/.
&'B'$7$%&./5&.
5V
3.3V/ 1.8V
/*<
8(& &TKXGT
/%
SPI
670'4
(/
74AHC244
SWITCH
Interface
DAC_MCLK / BCK
/ LRCK
DAC_MCLK / BCK
/ LRCK / DAC_DATA
svhkRVT
USB
ADC_DATA
(70%6+10-';'#
LPF
PWM
TAS5548
TAS5612LA
3.3V
CTL
I2C
62##
12.288 MHz
3.3V
PVDD(26V)/GVDD(12V)
AUX
IR
FRONT
TOUCH
6%
617%*-';'#617%*5.+&''#
I2C
AUX L/R
AUX
(Front)
BLOCK DIAGRAMS
1. SYSTEM BLOCK DIAGRAM