Sony HBD-DZ940K User Manual

HBD-DZ340M/DZ640M/DZ840K/DZ840M/DZ940K
HBD-DZ340M/DZ640M/DZ840K/DZ840M/DZ940K
2626
6 PWM_A
8 PWM_B
7
5
/RESET_AB
/SD
OUT_A
BST_A
BST_B
BST_C
BST_D
23 9SDIN1
22 SDIN2
ASDATA0
ASDATA1
ASDATA2
I2C_CLK_PRO
I2C_DATA_PRO
TAS_GPIO1
NS_INIT
DAMP_MUTE
I2C_CLK_PRO
I2C_DATA_PRO
TAS_GPIO1
DAMP_INIT
DAMP_MUTE
21 DSIN3
PWM3_RI
8PWM3_RD
5PWM3_LI
4PWM3_LD
PWM2_RI
PWM2_RD
PWM2_LI
PWM2_LD
PWM1_RI
PWM1_RD
PWM1_LI
PWM1_LD
OUT_B
LPF
SUBWOOFER
TB3901
TB3002
SPEAKERS
CENTER
DIGITAL POWER AMP
IC3100
LPF
DC BALANCE
DETECT
Q3401
D3551
16 PWM_C
18 PWM_D
17 /RESET_CD
OUT_C
OUT_D
LPF
LPF
DC BALANCE
DETECT
Q3301
6 PWM_A
WF
WF
C
C
FR
FR
FL
FL
SR
SR
SL
SL
8 PWM_B
7
5
/RESET_AB
/SD
LPF
DIGITAL POWER AMP
IC3300
LPF
DC BALANCE
DETECT
Q3202
16 PWM_C
18 PWM_D
17 /RESET_CD
LPF
LPF
DC BALANCE
DETECT
Q3251
6 PWM_A
8 PWM_B
7
5
/RESET_AB
/SD
LPF
DIGITAL POWER AMP
IC3350
SYSTEM CONTROLLER
IC5002 (4/5)
S-MASTER PROCESSOR
IC3001 (2/2)
LPF
DC BALANCE
DETECT
Q3252
16 PWM_C
18 PWM_D
17 /RESET_CD
FAN14V
LPF
LPF
DC BALANCE
DETECT
Q3201
DC BALANCE
PROTECT
Q3551
PVDD DOWN DETECT
Q3552
EN
+32.5V
BUFFER
Q5002
FAN
DRIVE
Q3001 – 3002
3
33 I2C_SDA
34 I2C_SCL1
36 GPIO2
39 /RESET
38 /MUTE
2
4
47
48
73
57
58
EN
SD_PVDD_DET
DC-DET
54DRIVE_RST(EN)
67SD/PVDD_DET
66DC_DET
2
99
98
X3001
24.576MHZ
97
BUFFER
IC3002
96
93
92
(+)
(–)
(–)
(+)
FRONT L
SPEAKERS
FRONT R
(+)
(–)
SUR L
(+)
(–)
SUR R
(+)
(–)
(+)
(–)
FAN3001
FAN MOTOR
26 MCLKIN
ACLKACLK
ABCK
ALRCK
25 SCLKIN
24 LRCLKIN
A.CAL_OUT_LEVEL
68
G
POWER
SECTION
A
RF
SECTION
x SIGNAL PATH
: TUNER
39
36
43
34
31
28
33
24
OUT_A
BST_A
BST_B
BST_C
BST_D
OUT_B
OUT_C
OUT_D
39
36
43
34
31
28
33
24
OUT_A
BST_A
BST_B
BST_C
BST_D
OUT_B
OUT_C
OUT_D
39
36
43
34
31
28
33
24
87
86
XTAL_IN
XTAL_OUT
5-4. BLOCK DIAGRAM – AMP Section –
(Page 23)
(Page 27)

Sony HBD-DZ940K Specifications

General

Brand	Sony
Model	HBD-DZ940K
Category	Receiver
Language	English