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Icom IC-F33GS Service Manual

Icom IC-F33GS
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4 - 1
4-1 RECEIVER CIRCUITS
4-1-1 ANTENNA SWITCHING CIRCUIT (PA UNIT)
The antenna switching circuit functions as a low-pass filter
while receiving and a resonator circuit while transmitting.
This circuit does not allow transmit signals to enter the
receiver circuits.
Received signals enter the antenna connector (CHASSIS;
J1) and pass through the low-pass filter (ANT unit; L801,
L802, C803). The filtered signals are passed through the
λ
4
type antenna switching circuit (D701, D704, D706) and then
applied to the RF circuit.
4-1-2 RF CIRCUIT (MAIN UNIT)
The RF circuit amplifies signals within the range of frequen-
cy coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass through
the two-stage tunable bandpass filters (D19, D24, L7, L8,
C27, C369). The filtered signals are amplified at the RF
amplifier (Q5) and then passed through the another two-
stage tunable bandpass filters (D14, D15, L11, C39, C45)
to suppress unwanted signals. The filtered signals are
applied to the 1st mixer circuit.
D14, D15, D19 and D24 employ varactor diodes, that are
controlled by the CPU via the D/A converter (IC12), to track
the bandpass filter. These varactor diodes tune the center
frequency of an RF passband for wide bandwidth receiving
and good image response rejection.
SECTION 4 CIRCUIT DESCRIPTION
4-1-3 1ST MIXER AND 1ST IF CIRCUITS
(MAIN UNIT)
The 1st mixer circuit converts the received signal into fixed
frequency of the 1st IF signal with the PLL output frequency.
By changing the PLL frequency, only the desired frequency
passes through a monolithic filter at the next stage of the
1st mixer.
The RF signals from the bandpass filter are mixed with the
1st LO signals, where come from the RX VCO circuit, at the
1st mixer circuit (Q6) to produce a 46.35 MHz 1st IF sig-
nal. The 1st IF signal is passed through a monolithic filter
(FI1) to suppress out-of-band signals. The filtered signal is
applied to the 2nd IF circuit after being amplified at the 1st
IF amplifier (Q7).
4-1-4 2ND IF AND DEMODULATOR CIRCUITS
(MAIN UNIT)
The 2nd mixer circuit converts the 1st IF signal into a 2nd
IF signal. The double-conversion superheterodyne system
(which convert receive signals twice) improves the image
rejection ratio and obtains stable receiver gain.
The 1st IF signal from the IF amplifier (Q7) is applied to
the 2nd mixer section of the FM IF IC (IC9, pin 16), and is
mixed with the 2nd LO signal to be converted into a 450
kHz 2nd IF signal.
The FM IF IC (IC9) contains the 2nd mixer, limiter amplifier,
quadrature detector, active filter and noise amplifier circuits.
A 2nd LO signal (45.9 MHz) is produced at the PLL circuit
by tripling it’s reference frequency 15.3 MHz).
Mixer
16
Limiter
amp.
2nd IF filter
450 kHz
X2
15.3 MHz
45.9 MHz
IC9 TA31136FN
12
1st IF from the IF amplifier (Q7)
"RSSI" signal to the CPU ( IC22, pin 50)
11109
87
5
AF signal "DET"
"SQLC" signal from the
D/A converter IC
(IC12, pin 2)
R5V
X1
2
Active
filter
Noise
detector
FM
detector
13
"NOIS" signal to the CPU (IC22, pin 75)
RSSI
Noise
amp.
Noise
comparator
×3
Q22
FI2
3
• 2ND IF DEMODULATOR CIRCUIT

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Icom IC-F33GS Specifications

General IconGeneral
BrandIcom
ModelIC-F33GS
CategoryTransceiver
LanguageEnglish

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