Chapter 2 Register Map and Descriptions
© National Instruments Corporation 2-7 6527 Register-Level Programmer Manual
Filter Interval Registers
The Filter Interval Registers control the filter interval for distinguishing between valid input
pulses and glitches. Refer to the 6527 User Manual for information on selecting a filter
interval. Set the Filter Interval Registers to the desired filter interval divided by 200 ns.
The filter interval is a 20-bit value. It occupies two 8-bit registers and 4 bits of a third register.
After you set the filter interval, write to the ClrInterval bit of the Clear Register to ensure that
the new filter interval takes effect immediately. The filter interval affects only those input lines
for which you have set the Filter Enable Registers.
Address Offset: 08:0A (hex)
Type: Read and write
Word Size: Three 8-bit registers
Address Offset: 0A (hex)
Bit Map:
Address Offset: 09 (hex)
Bit Map:
Address Offset: 08 (hex)
Bit Map:
Bit Name Description
23–20 Reserved Write only zeroes to these bits.
19–0 FI.<19..0> Filter interval, bits 19 down to 0, in increments of 200 ns.
23 22 21 20 19 18 17 16
Reserved Reserved Reserved Reserved FI.19 FI.18 FI.17 FI.16
15 14 13 12 11 10 9 8
FI.15 FI.14 FI.13 FI.12 FI.11 FI.10 FI.9 FI.8
76543210
FI.7 FI.6 FI.5 FI.4 FI.3 FI.2 FI.1 FI.0
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