Texas Instruments BQ76942EVM User Manual

CHG
FUSEPIN
FUSE
VSS
PGND
VSS
Red
D3
FUSE
10k
R67
10M
R60
10M
R53
10M
R59
5.1k
R70
5.1k
R63
20k
R75
1
10M
R52
5.1k
R74
1
2
3
F1
SFK-3030
DNP
BQ771807DPJR
VDD
1
V5
2
V4
3
V3
4
V2
5
V1
6
VSS
7
OUT
8
PAD
9
U7
5.1k
R72
5.1k
R73
16V
D4
10M
R46
DNP
FBAT
TP30 TP31 TP32 TP33
TP28
TP27
TP25
0
R56
DNP
0
R66
51
R65
DNP
40V
D7
16V
D6
16V
D5
7P
6P
5P
4P
3P
2P
1P
100
R57
TP35 TP36
TP34
TP29
TP26
TP37
100V
D8
PACK-
PACK+
PGND
PACK-
PACK+
E6
PGND
1
2
J20
DNP
E5
CPACK+
CPACK+
PDSGPCHGCHG
FUSE
PCHG PDSG
Output
10A max
D3, R55, and R58 are not required in design, but used to simulate fuse blown condition.
1
CD
NT2
Net-Tie
CPACK+
PACK+
TP38
PGND
BQ771807DPJR
VDD
1
V5
2
V4
3
V3
4
V2
5
V1
6
VSS
7
OUT
8
PAD
9
U6
8P
1.0k
R71
1.0k
R64
1.0k
R69
1.0k
R68
1.0k
R48
1.0k
R42
1.0k
R47
1.0k
R45
10P
9P
100
R41
20k
R49
10M
R61
BAT+
13V-32V (2-5 cells + VOUT)
0.1uF
C27
0.1uF
C32
0.1uF
C33
Desired voltage to Q11 Gate: <12V, >5V
0.1uF
C39
0.1uF
C43
0.1uF
C26
0.1uF
C28
0.1uF
C30
0.1uF
C34
0.1uF
C38
0.1uF
C40
0.1uF
C41
0.1uF
C42
Q10
4.7k
R44
DNP
10V
D9
1
2
3
4
1
2
3
4
J21
0.1uF
C25
1.0k
R43
36k
R54
0.1uF
C36
1.0k
R62
3
1
2
Q4
MMBTA56LT1G
3.9k
R55
0.1uF
C35
0.1uF
C37
4
7,8
1,2,3
5,6,
Q3
DNP
3
1
2
Q2
DNP
3.9k
R51
1
2 3
Q11
PMV213SN,215
3.9k
R50
3
1
2
Q5
3
1
2
Q6
4
7,8
1,2,3
5,6,
Q7
DNP
4
7,8
1,2,3
5,6,
Q9
4
7,8
1,2,3
5,6,
Q8
DSG
TP40TP39
TP41
PACK
LD
DSG
7.5k
R77
PACK LD
100V
D11
DNP
100V
D12
DNP
100V
D13
DNP
VSS
100V
D10
5.1k
R78
5.1k
R81
5.1k
R83
5.1k
R79
DNP
5.1k
R80
DNP
5.1k
R82
5.1k
R84
5.1k
R76
0.1uF
C24
DNP
0.1uF
C23
DNP
0.1uF
C29
DNP
0.1uF
C31
DNP
3.9k
R58
Figure 5-11. Schematic Diagram FETs
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BQ76942EVM Circuit Module Physical Construction
SLUUC32A – NOVEMBER 2019 – REVISED OCTOBER 2020
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BQ76942 Evaluation Module 41
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Texas Instruments BQ76942EVM Specifications

General

Brand	Texas Instruments
Model	BQ76942EVM
Category	Motherboard
Language	English