SAM-M8Q - Hardware Integration Manual
UBX-16018358 - R05 Production Information Hardware description
Page 6 of 23
Avoid high resistance on the V_BCKP line: During the switch from main supply to backup supply, a short
current adjustment peak can cause high voltage drop on the pin with possible malfunctions.
If no backup supply voltage is available, connect the V_BCKP pin to VCC_IO.
As long a supply is connected to VCC_IO of SAM‑M8Q antenna module, the backup battery is
disconnected from the RTC and the BBR to avoid unnecessary battery drain (see Figure 1). In this case,
VCC_IO supplies power to the RTC and BBR. V_BCKP supplies the RTC and BBR in case VCC_IO voltage
goes below 1.4V.
Figure 1: Backup battery and voltage
1.4 Interfaces
1.4.1 UART
The SAM‑M8Q antenna module includes a Universal Asynchronous Receiver Transmitter (UART) serial interface,
RxD/TxD, which supports configurable baud rates, as specified in the SAM-M8Q Data Sheet [1]. The signal
output and input level is 0 V to VCC_IO. An interface based on RS232 standard levels (+/- 12 V) can be
implemented using level shifters, such as Maxim MAX3232. Hardware handshake signals and synchronous
operation are not supported.
1.4.2 Display Data Channel (DDC)
An I
2
C compatible Display Data Channel (DDC) interface is available with SAM‑M8Q antenna modules for serial
communication with an external host CPU. The interface only supports operation in slave mode (master mode is
not supported). The DDC protocol and electrical interface are fully compatible with the Fast-Mode of the I
2
C
industry standard. DDC pins SDA and SCL have internal pull-up resistors to VCC_IO.
For more information about the DDC implementation, see the u-blox 8 / u-blox M8 Receiver Description
Including Protocol Specification [2]. For bandwidth information, see the SAM-M8Q Data Sheet [1]. For timing
parameters, consult the I2C-bus specification [6].
The SAM-M8Q DDC interface supports serial communication with u-blox cellular modules. See the
specification of the applicable cellular module to confirm compatibility.
TX_READY
The TX_READY function is used to indicate when the receiver has data to transmit on DDC interface. A listener
can wait on the TX_READY signal instead of polling the DDC interfaces. The UBX-CFG-PRT message lets you
configure the polarity and the number of bytes in the buffer before the TX READY signal goes active. The
TX_READY function can be mapped to TXD (PIO 06). The TX_READY function is disabled by default.
The TX_READY functionality can be enabled and configured by AT commands sent to the u-blox cellular
module supporting the feature. For more information see the GPS Implementation and Aiding Features in
u-blox wireless modules [7].
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