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Clevo P770DM User Manual

Clevo P770DM
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Schematic Diagrams
Lynix Point 1/7 B - 17
B.Schematic Diagrams
Lynix Point 1/7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTC Wake UP
RTC Wake UP
DEFAULT
BIOS ROM 4MB
SPI_* = 0.5"~2"
ME+ BIOS ROM 8MB
SPI_* = 0.5"~2"
DESIGN NOTE:
ESPI FLASH SHARING MODE
0: MAST ERATTACHED FLASH SHARING
1: SLAVE AT TACEHD FLASH SHARING
PCH HAS INTERNALWEAK PD
Lynx Point - M (SPI,GPP)
DESIGN NOTE:
BOOT HALT ENABLED IF LOW
PCH HAS INTERNALWEAK PU
DESIGN NOTE:
JTAG ODT IS D ISABLE D IF LOW
PCH HAS INTERNALWEAK PU
DESIGN NOTE:
SMB RESUME/MAIN LOGIC
BIOS DEBUG PORT
1/30
DESIGN NOTE:
TOUCH PANEL
2/3
Co_Lay
' ( )
DESIGN NOTE:
BOOT SELECT STRAP
IF SAMPLED HIGH, LPC IS SELE CTED
ELSE SPI PCH HAS INTERNAL WEAK PD.
DESIGN NOTE:
MB det
H:P75 L:P77
DESIGN NOTE:
EDP/LVDS det
H:EDP L:LVD S
D02

,CS0#

4/30
D02
1
5/5
D02

5/5
23
LAYOUT
4
,
45
67
J_80DEBUG2
D02

,

VIA
5/8
D02

,

VIA
5/8
D02
1
5/26
./
MB det
6/16
07/27 Follow
%
change
SSPI_SI
SSPI_SO
SSPI_SI
SSPI_SO
SSPI_SCLK SSPI_SCLK
SSPI_WP#1 SSPI_CS1#
SSPI_HOLD#1
SSPI_WP#0 SSPI_CS0#
SSPI_HOLD#0
PLT_RST#
GPP_H_1 2
TCH_PNL_INTR_N
SPI_MOSI
SPI_MISO
TBCIO_PLUG_EVENT
EXT TS _SNI_DRV 0_P CH
EXT TS _SNI_DRV 1_P CH
UART2 _RXD
UART2 _TX D
SPI_CS_1#
SPI_SCLK_R
SPI_MOSI
SPI_MISO
SPI_CS_0#
SPI1_TCHPNL_IO2
PCH_SPI_IO2
SSPI_WP#1
PCH_SPI_IO3
SSPI_HOLD#1
SSPI_HOLD#0
SSPI_WP#0
SPI_CS_2#
TP_GPP_H_11_SML2CLK
GPP_H_12
HOME_BTN_PCH
TP_GPP_H_18
M.2_WIGIG_RST_R
M.2_WIGIG_WAKE_R_N
TBT_FRC_PWR
TBCIO_PLUG_EVENT
EXT TS _SNI_DRV 0_P CH
TCH_P NL_INTR_N
EXT TS _SNI_DRV 1_P CH
SSPI_CS1#
SSPI_CS0#
SSPI_SI
SSPI_SO
SSPI_SCLK
SPI_CS_0#
SPI_CS_1#
SPI_MOSI
SPI_SCLK_R
SPI_MISO
PME# PLT_RST#
SM_INT RUDER#
LPSS_GSPI1_MOSI
UART2 _TX D
UART2 _RXD
LPSS_GSPI1_MOSI
PCH_SPI_IO3
GPP_A23
GPP_A22
GPP_A22 GPP_A23
UART2 _TX D
UART2 _RXD
VDD3
UART2 _TX D
UART2 _RXD
GND
3.3V_SPI
3.3V_SPI
3.3VA
3.3VS
3.3VA
3.3VS
V3P3A_V1P8A_PCH_SPI
V3P3A_V1P8A_PCH_SPI
3.3VA
5VS
3.3VA
3.3VA
3.3VS
3.3VS
VDD3
VDD3
3.3VA
3.3VS
VCCPGPPA
RTCVCC
3.3VA
3.3VA 3.3VA
VDD3
VDD3
BUF_PLT_RST# 25,26,31,32,36,38,41
VDD317,18,20,21,25,31,32,34,36,43,45,46,47,50,51
3.3VS10,11,12,13,14,15,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
5VS11,13,14,15,27,29,30,31,33,35,46,47
V3P3A_V1P8A_PCH_SPI21
RTCVCC18,21
PM_P CH_P WROK17,18,21,31
SMB_DATA_MAIN 10,7,8,9
SMB_CLK_MAIN 10,7,8,9
SMB_DATA 18,27,28,35
SMB_CLK 18,27,28,35
VCCPGPPA21
HSPI_SCLK31
HSPI_CE#31
HSPI_MSO31
HSPI_MSI31
TBT_FRC_PWR 38
TBCIO_PLUG_EVENT 38
3.3VA17,18,20,21,3,46
TBTA_MRESET40
VDD523,43,44,45,46
PLT_RST# 15,42
LPSS_GSPI0_MISO25
LPSS_GSPI0_MOSI19
SB_BLON 11
TBTA_ACE_GPIO0 40
TBTA_ACE_GPIO3 40
TBTA_ACE_GPIO2 40
TPM_DET# 42
PCM_INT_186328
Title
Size Docum ent Numbe r Rev
Date: Sheet
of
6-71-P75D0-D03
2.0
[16] Lynx 1/7-SPI/GPP
A3
16 62Monday, August 03, 2015
!!DMFWP!DP/
SCHEM ATIC1
Title
Size Docum ent Numbe r Rev
Date: Sheet
of
6-71-P75D0-D03
2.0
[16] Lynx 1/7-SPI/GPP
A3
16 62Monday, August 03, 2015
!!DMFWP!DP/
SCHEM ATIC1
Title
Size Docum ent Numbe r Rev
Date: Sheet
of
6-71-P75D0-D03
2.0
[16] Lynx 1/7-SPI/GPP
A3
16 62Monday, August 03, 2015
!!DMFWP!DP/
SCHEM ATIC1
C669 *1u_6.3V_X5R_04C669 *1u_6.3V_X5R_04
R758
*20K_04
R758
*20K_04
R773 1K_1%_04R773 1K_1%_04
Q49
2SK3018S3
Q49
2SK3018S3
G
DS
R709 1K _04R709 1K_04
R770 33_04R770 33_04
R755 1K_04R755 1K_04
R678
1K_04
R678
1K_04
R238 10K_04R238 10K _04
R707 *1K_04R707 *1K_04
R198 33_04R198 33_04
R769 *33_04R769 *33_04
U17
GD25B64BSIGR
U17
GD25B64BSIGR
CE#
1
SO
2
WP#
3
VSS
4
SI
5
SCK
6
HOLD#
7
VDD
8
R674 1K_04R674 1K_04
C657 *1u_6.3V_X5R_04C657 *1u_6.3V_X5R_04
R754 33_04R754 33_04
PJ49 *OPEN-1mmPJ49 *OPEN-1mm
12
S
D
G
Q48A
MTDK5S6R
S
D
G
Q48A
MTDK5S6R
2
61
R753 *10mil_shortR753 *10mil_short
R258 1M_04R258 1M_04
PJ48 *OPEN-1mmPJ48 *OPEN-1mm
12
R685 1K_04R685 1K_04
S
D
G
Q48B
MTDK5S6R
S
D
G
Q48B
MTDK5S6R
5
34
SKL_PCH_H
REV = 1.3
1OF12
?
?U16A
Z170 MP
SKL_PCH_H
REV = 1.3
1OF12
?
?U16A
Z170 MP
INTRUDER#
BE11
GPP_H10/SML2CLK
BD34
GPP_H11/SML2DATA
AW35
GPP_H12/SML2ALERT#
BD35
GPP_H13/SML3CLK
BC35
GPP_H14/SML3DATA
BA35
GPP_H15/SML3ALERT#
BB36
GPP_H16/SML4CLK
BD39
GPP_H17/SML4DATA
BE34
GPP_H18/SML4ALERT#
BC36
GPP_B4/CPU_GP3
BD24
GPP_B3/CPU_GP2
BC23
GPP_E7/CPU_GP1
AE44
GPP_E3/CPU_GP0
AF41
GPP_G15/GSXSRESET#
R41
GPP_G14/GSXDIN
R42
GPP_G13/GSXSLOAD
R36
GPP_G12/GSXDOUT
R39
GPP_G16/GSXCLK
P43
GPP_B13/PLTRST#
BB27
GPP_D21
AG44
GPP_D22
AH43
GPP_D3
AN41
GPP_D0
AL39
SPI0_CS2#
AT3 1
SPI0_IO3
BD30
SPI0_IO2
BC29
SPI0_CLK
BC31
SPI0_CS0#
BD31
RSVD
AE17
RSVD
AF17
RSVD
AG14
TP5
AR19
TP4
AN17
SPI0_MOSI
BB29
SPI0_MISO
BE30
SPI0_CS1#
AW31
GPP_D1
AN36
GPP_D2
AN38
RSVD
AG15
GPP_A11/PME#
BD17
R736 *0_04R736 *0_04
R216 8.2K_04R216 8.2K_04
C668 *1u_6.3V_X5R_04C668 *1u_6.3V_X5R_04
R772 *1K_1%_04R772 *1K_1%_04
R698 8.2K_04R698 8.2K_04
R757
*4.7K_04
R757
*4.7K_04
R206
*4.7K_04
R206
*4.7K_04
J_80DEBUG2
*85204-04001
J_80DEBUG2
*85204-04001
1
2
3
4
R771 33_04R771 33_04
R686 1K_04R686 1K_04
R205
*4.7K_04
R205
*4.7K_04
R739 *10mil_shortR739 *10mil_short
R200 0_04R200 0_04
C744
0.1u_10V_X7R_04
C744
0.1u_10V_X7R_04
R949 10K_04R949 10K_04
R804
*10K_04
R804
*10K_04
R737
1K_04
R737
1K_04
R740 *10mil_shortR740 *10mil_short
R766 *33_04R766 *33_04
R768 *1K_1%_04R768 *1K_1%_04
R767 *1K_1%_04R767 *1K_1%_04
R201 0_04R201 0_04
U18
*GD25B32B
U18
*GD25B32B
CE#
1
SO
2
WP#
3
VSS
4
SI
5
SCK
6
HOLD#
7
VDD
8
R785
10K_04
R785
10K_04
C715 0.1u_10V_X7R_04C715 0.1u_10V_X7R_04
R188
*4.7K_04
R188
*4.7K_04
U47
MC74V HC1G08 DFT2G
U47
MC74V HC1G08 DFT2G
1
2
5
4
3
R950 10K_04R950 10K_04
R207 0_04R207 0_04
R774 33_04R774 33_04
R679
1K_04
R679
1K_04
R738
*20K_04
R738
*20K_04
R673 1K_04R673 1K_04
R187
*20K_04
R187
*20K_04
R197 0_04R197 0_04
R803
*10K_04
R803
*10K_04
R731 *10mil_shortR731 *10mil_short
R155 10K _04R155 10K_04
R217 33_04R217 33_04
R756 33_04R756 33_04
C658 *1u_6.3V_X5R_04C658 *1u_6.3V_X5R_04
R784
10K_04
R784
10K_04
R741 *10K_04R741 *10K_04
C745
*0.1u_10V_X7R_04
C745
*0.1u_10V_X7R_04
R752 *33_04R752 *33_04
R199 0_04R199 0_04
SKL_PCH_H
?
?
11 OF 12
REV = 1.3
U16K
Z170 MP
SKL_PCH_H
?
?
11 OF 12
REV = 1.3
U16K
Z170 MP
GPP_B22/GSPI1_MOSI
AT2 9
GPP_B21/GSPI1_MISO
AR29
GPP_B20/GSPI1_CLK
AV29
GPP_B19/GSPI1_CS#
BC27
GPP_B18/GSPI0_MOSI
BD28
GPP_B17/GSPI0_MISO
BD27
GPP_B16/GSPI0_CLK
AW27
GPP_B15/GSPI0_CS#
AR24
GPP_C9/UART0_TXD
AV44
GPP_C8/UART0_RXD
BA41
GPP_C11/UART0_CTS#
AU44
GPP_C10/UART0_RTS#
AV43
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AU41
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AT4 4
GPP_C13/UART1_TXD/ISH_UART1_TXD
AT4 3
GPP_C12/UART1_RXD/ISH_UART 1_RXD
AU43
GPP_C23/UART2_CTS#
AN43
GPP_C22/UART2_RTS#
AN44
GPP_C21/UART2_TXD
AR39
GPP_C20/UART2_RXD
AR45
GPP_C19/I2C1_SCL
AR41
GPP_C18/I2C1_SDA
AR44
GPP_C17/I2C0_SCL
AR38
GPP_C16/I2C0_SDA
AT4 2
GPP_D4/ISH_I2C2_SDA/I2C3_SDA
AM44
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
AJ44
GPP_D9
AL44
GPP_D10
AL36
GPP_D11
AL35
GPP_D12
AJ39
GPP_D16/ISH_UART0_CTS#
AJ43
GPP_D15/ISH_UART0_RTS#
AL43
GPP_D14/ISH_UART0_TXD
AK44
GPP_D13/ISH_UART0_RXD
AK45
GPP_H20/ISH_I2C0_SCL
BC38
GPP_H19/ISH_I2C0_SDA
BB38
GPP_H22/ISH_I2C1_SCL
BD38
GPP_H21/ISH_I2C1_SDA
BE39
GPP_A23/ISH_GP5
BC22
GPP_A22/ISH_GP4
BD18
GPP_A21/ISH_GP3
BE21
GPP_A20/ISH_GP2
BD22
GPP_A19/ISH_GP1
BD21
GPP_A18/ISH_GP0
BB22
GPP_A17/ISH_GP7
BC19
R191
100K_04
R191
100K_04
Q50
2SK3018S3
Q50
2SK3018S3
G
DS
Sheet 16 of 62
Lynix Point 1/7

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Clevo P770DM Specifications

General IconGeneral
BrandClevo
ModelP770DM
CategoryLaptop
LanguageEnglish

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