Intel DH61BF User Manual

Intel Desktop Board DH61BF Technical Product Specification
64
Table 34. Port 80h POST Codes (continued)
Port 80 Code Progress Code Enumeration
Memory
0x21 MRC entry point
0x23 Reading SPD from memory DIMMs
0x24 Detecting presence of memory DIMMs
0x27 Configuring memory
0x28 Testing memory
0x29 Exit MRC driver
PEI after MRC
0x2A Start to Program MTRR Settings
0x2B Done Programming MTRR Settings
PEIMs/Recovery
0x31 Crisis Recovery has initiated
0x33 Loading recovery capsule
0x34 Start recovery capsule / valid capsule is found
CPU Initialization
CPU PEI Phase
0x41 Begin CPU PEI Init
0x42 XMM instruction enabling
0x43 End CPU PEI Init
CPU PEI SMM Phase
0x44 Begin CPU SMM Init smm relocate bases
0x45 Smm relocate bases for APs
0x46 End CPU SMM Init
CPU DXE Phase
0x47 CPU DXE Phase begin
0x48 Refresh memory space attributes according to MTRRs
0x49 Load the microcode if needed
0x4A Initialize strings to HII database
0x4B Initialize MP support
0x4C CPU DXE Phase End
CPU DXE SMM Phase
0x4D CPU DXE SMM Phase begin
0x4E Relocate SM bases for all APs
0x4F CPU DXE SMM Phase end
I/O Buses
0x50 Enumerating PCI buses
0x51 Allocating resources to PCI bus
0x52 Hot Plug PCI controller initialization
continued

Intel DH61BF Specifications

General

Brand	Intel
Model	DH61BF
Category	Motherboard
Language	English