Intel Xeon Phi User Manual

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE
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The code shown below is an example of a single host CPU thread attempting to offload the reduction code to
the Intel® Xeon Phi™ Coprocessor using OpenMP in the offload construct.
float OMP_reduction(float *data, int size)
{
float ret = 0;
#pragma offload target(mic) in(size) in(data:length(size))
{
#pragma omp parallel for reduction(+:ret)
for (int i=0; i<size; ++i)
{
ret += data[i];
}
}
return ret;
}
Code Example 5: C/C++: Using OpenMP in Offloaded Reduction Code
real function FTNReductionOMP(data, size)
implicit none
integer :: size
real, dimension(size) :: data
real :: ret = 0.0
!dir$ omp offload target(mic) in(size) in(data:length(size))
!$omp parallel do reduction(+:ret)
do i=1,size
ret = ret + data(i)
enddo
!$omp end parallel do
FTNReductionOMP = ret
return
end function FTNReductionOMP
Code Example 6: Fortran: Using OpenMP* in Offloaded Reduction Code
Parallel Programming on the Intel® Xeon Phi™ Coprocessor: OpenMP* + Intel® Cilk™ Plus
Extended Array Notation
The following code sample further extends the OpenMP example to use Intel Cilk Plus Extended Array
Notation. In the following code sample, each thread uses the Intel Cilk Plus Extended Array Notation
__sec_reduce_add() built-in reduction function to use all 32 of the Intel® MIC Architecture’s 512-bit vector
registers to reduce the elements in the array.
float OMPnthreads_CilkPlusEAN_reduction(float *data, int size)
{
float ret=0;
#pragma offload target(mic) in(data:length(size))
{

Intel Xeon Phi Specifications

General

Threads per core	4
Threads	Up to 288
Interface	PCIe 3.0 x16
PCIe Version	3.0
Cores	Up to 72
Memory	Up to 16 GB
TDP	215 W to 300 W
Socket	LGA 3647
Manufacturing Process	14 nm
Instruction Set	x86-64
Process Technology	14nm

Summary

Understanding the Intel® Xeon Phi™ Coprocessor

Introduction

Overview of the Intel® Xeon Phi™ Coprocessor and its purpose.

Intel® Many Integrated Core Architecture Overview

Details the architecture of the Intel® Xeon Phi™ Coprocessor, including its cores and vector units.

Intel® Xeon Phi™ System Setup and Installation

Preparing Your System for First Use

Guides through the initial setup and installation of drivers and software.

Steps to install the Software Development tools

Instructions for installing the necessary compilers and development tools.

Regaining Access to the Intel® Xeon Phi™ Coprocessor after Reboot

Procedures for re-establishing access to the coprocessor after a system reboot.

Developing Applications for Intel® Xeon Phi™

Getting Started/Developing Intel® Xeon Phi™ Software

Introduces the process of developing applications for the Intel® Xeon Phi™ Coprocessor.

Available Software Development Tools / Environments

Lists and describes the compilers, libraries, and tools for development.

Documentation and Sample Code

Points to essential documentation and sample code for learning and development.

Optimizing Performance on Intel® Xeon Phi™

Using the Offload Compiler – Explicit Memory Copy Model

Explains the explicit memory copy model for offloading code to the coprocessor.

Parallel Programming Options on the Intel® Xeon Phi™ Coprocessor

Covers various parallel programming models like OpenMP, Cilk Plus, and TBB.

Using Intel® MKL

Details how to use the Intel Math Kernel Library for performance optimization.