Intel Xeon Phi User Manual

Intel® Xeon Phi™ Coprocessor DEVELOPER’S QUICK START GUIDE
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Figure 3.1: Using MKL Native Acceleration with Offload
SGEMM Sample
Using SGEMM routine from BLAS library
Sample Code – sgemm
Step 1: Initialize the matrices, which in this example need to be global variables to make use of data
persistence.
Step 2: Send the data over to the Intel® Xeon Phi™ Coprocessor using #pragma offload. In this
example, the free_if(0) qualifier is used to make the data persistent on the Intel® Xeon Phi™
Coprocessor.
#define PHI_DEV 0
#pragma offload target(mic:PHI_DEV) \
in(A:length(matrix_elements) free_if(0)) \
in(B:length(matrix_elements) free_if(0)) \
in(C:length(matrix_elements) free_if(0))
{
}
Code Example 14: Sending the Data to the Intel® Xeon Phi™ Coprocessor
Step 3: Call sgemm inside the offload section to use the “Native Acceleration” version of Intel® MKL on
the Intel® Xeon Phi™ Coprocessor. The nocopy() qualifier causes the data copied to the card in step 2
to be reused.
#pragma offload target(mic:PHI_DEV) \
in(transa, transb, N, alpha, beta) \
nocopy(A: alloc_if(0) free_if(0)) nocopy(B: alloc_if(0) free_if(0)) \
out(C:length(matrix_elements) alloc_if(0) free_if(0)) // output data
{
sgemm(&transa, &transb, &N, &N, &N, &alpha, A, &N, B, &N,
&beta, C, &N);
}
Code Example 15: Calling sgemm Inside the Offload Section

Intel Xeon Phi Specifications

General

Threads per core	4
Threads	Up to 288
Interface	PCIe 3.0 x16
PCIe Version	3.0
Cores	Up to 72
Memory	Up to 16 GB
TDP	215 W to 300 W
Socket	LGA 3647
Manufacturing Process	14 nm
Instruction Set	x86-64
Process Technology	14nm

Summary

Understanding the Intel® Xeon Phi™ Coprocessor

Introduction

Overview of the Intel® Xeon Phi™ Coprocessor and its purpose.

Intel® Many Integrated Core Architecture Overview

Details the architecture of the Intel® Xeon Phi™ Coprocessor, including its cores and vector units.

Intel® Xeon Phi™ System Setup and Installation

Preparing Your System for First Use

Guides through the initial setup and installation of drivers and software.

Steps to install the Software Development tools

Instructions for installing the necessary compilers and development tools.

Regaining Access to the Intel® Xeon Phi™ Coprocessor after Reboot

Procedures for re-establishing access to the coprocessor after a system reboot.

Developing Applications for Intel® Xeon Phi™

Getting Started/Developing Intel® Xeon Phi™ Software

Introduces the process of developing applications for the Intel® Xeon Phi™ Coprocessor.

Available Software Development Tools / Environments

Lists and describes the compilers, libraries, and tools for development.

Documentation and Sample Code

Points to essential documentation and sample code for learning and development.

Optimizing Performance on Intel® Xeon Phi™

Using the Offload Compiler – Explicit Memory Copy Model

Explains the explicit memory copy model for offloading code to the coprocessor.

Parallel Programming Options on the Intel® Xeon Phi™ Coprocessor

Covers various parallel programming models like OpenMP, Cilk Plus, and TBB.

Using Intel® MKL

Details how to use the Intel Math Kernel Library for performance optimization.