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JVC GR-DVA10 Technical Guide

JVC GR-DVA10
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2-44
2.7 DECK CPU
2.7.1 Contents of DECK CPU processing
1) Mechanism control
Loading motor control
Drum motor control
Capstan motor control
2) Deck LSI control
DV DSP IC control
PRE / REC IC control
3) OSD control
On screen process
4) 1394 control
5) Sensor control
Tape sensor
Reel sensor
DEW sensor
Emergency process
2.7.2 DECK system composition
SYSCON
CPU
MDA
MECHA
DECK
DSP
DV_EQ
ON
SCREEN
PC I/F
UART
DV_ANA
PRE / REC
1394
PHY
DV
Terminal
DECK
CPU
16M
DRAM
16-bit
Parallel bus
Synchronous Serial
Communication
Synchronous Serial
Communication
16-bit
Multiplex bus
Fig. 2-7-1 DECK CPU system structure

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JVC GR-DVA10 Specifications

General IconGeneral
BrandJVC
ModelGR-DVA10
CategoryCamcorder
LanguageEnglish

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