JVC GR-DVA10 Technical Guide

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2.7.7 Deck CPU (IC1401: MN103004KRH) pin functions (1/5)
Pin No. Label In/Out
Description
1 CAP_BRK Out Capstan motor brake control
27 LD_ON Out Loading motor ON/OFF control
14 ANA_CS Out Chip select signal (To DV_ANA: IC3301)
28 OSD_CS Out Chip select signal (To OSD: IC1002)
2 VSS - GND
29 MIC_CTL Out Power supply control to MIC
3 PHY_PD Out Power down control (To PHY: IC3101)
61 PHY_RST Out Reset output (To PHY: IC3101)
15 PHY_CNA In IEEE1394 connection detect (Connect: L)
45 ANA_PD Out Power down control (To DV_ANA: IC3301)
16 VMUTE_IN In Video mute input
46 -
4-
30 VDDH - Power supply (REG_3V)
31 -
62 -
5 RWSEL Out Read/write select signal of Bus
47 AS Out Address strobe signal of Bus
17 -
63 -
49 -
32 VSS - GND
18 -
79 -
6-
48 -
64 -
7-
65 D_GAIN Out Drum error gain control
19 VDDB - Power supply (REG_3V)
33 ADM15
20 ADM14
82 ADM13
50 ADM12
66 ADM11
8ADM10
67 ADM9
51 ADM8
34 VSS - GND
9ADM7
35 ADM6
21 ADM5
52 ADM4
10 ADM3
36 ADM2
22 ADM1
23 ADM0
In/Out
In/Out
Not used-
Not used-
Not used-
Not used-
Address/Data MPX BUS 16bits (From/To DECK_DSP: IC3001, DVEQ: IC3201)
Address/Data MPX BUS 16bits (From/To DECK_DSP: IC3001, DVEQ: IC3201)
Table 2-7-1 Deck CPU (IC1401: MN103004KRH) pin functions (1/5)

JVC GR-DVA10 Specifications

General

Brand	JVC
Model	GR-DVA10
Category	Camcorder
Language	English