Quantum Q280 User Manual

-ATN (ATTENTION). A signal driven by an initiator to indicate the
ATTENTION condition.
-RST (RESET). An "oR-tied" signal that indicates the RESET condition.
-DB(7-0,P) (DATA BUS). Eight data-bit signals, plus a parity-bit
signal, that form a DATA BUS. -DB(7) is the most significant bit and
has the highest priority during the arbitration phase. Bit number,
significance, and priority decrease downward to -DB(O). A data bit is
defined as one when the signal is asserted and is defined as zero when
the signal is non-asserted.
Data parity -DB(P) is odd. The use of parity is a system option
(i.e., a system is configured so that all SCSI devices on a bus
generate parity and have parity detection enabled, or all SCSI devices
have parity detection disabled or not implemented). Parity is not
valid during the ARBITRATION phase.
TERMPWR. 4.0 V dc to 5.25 V dc provided by each device for the bus
terminations in other SCSI devices, to keep the line terminated in the
event of 5 V failure.
2.2.5
SCSI Bus Timing
Delay-time measurements for each SCSI device are calculated from
signal conditions existing at that device's own SCSI bus connector.
Thus, the following delays (except cable skew delay) can be measured
without considering delays in the cable.
ARBITRATION DELAY (2.2 microseconds). The mlnlmum time an SCSI device
must wait from asserting -BSY for arbitration until the DATA BUS can
be examined to see if arbitration has been won. There is no maximum
time.
BUS CLEAR DELAY (800 nanoseconds). The maximum time for an SCSI
device to stop driving all bus signals after:
(1) The BUS FREE phase is detected (-BSY and -SEL both
deasserted for a bus settle delay period).
(2) -SEL is received from another SCSI device during the
ARBITRATION phase.
(3) The transition of -RST to asserted.
NOTE: For the first condition above, the maximum time for an SCSI
device to clear the bus is 1200 nanoseconds from -BSY and -SEL first
becoming both deasserted. If an SCSI device requires more than a bus
settle delay to detect BUS FREE phase, it must clear the bus within a
bus clear delay minus the excess time.
2-12

Quantum Q280 Specifications

General

Brand	Quantum
Model	Q280
Category	Storage
Language	English