Quantum Q280 User Manual

o Checks buffer RAM during initialization.
o Generates parity and checks parity, for buffer RAM.
o Refreshes Buffer RAM.
o contains latches for the low-byte EPROM address (outputs
LAD 0-7).
o Provides additional microprocessor I/O (pins AUX 0-7).
o
contains 12-byte ECC syndrome generator.
4.2.1) .
(See section
2.3.10 Microprocessor and EPROM
Q250 and Q280 drives use 12 MHz industry-standard 8-bit micro-
processors as shown in the following table:
Table 2-3:
Microprocessors and
Buffer RAM
Internal FIFO
DisCache Microprocessor
Data RAM
Buffer
RAM
Buffer
No
8031 128
X
8
16
Kbytes 14
KBytes
Yes
8032
256 X 8
64
Kbytes 60
KBytes
The Internal data RAM is used for look-up tables that require fast
access. Communication with other devices is over the 8-bit MAD bus.
Firmware for the drive is stored in a 32 KB EPROM, a 27256, located at
U15. There are four different EPROMS: for Q250 and Q280, each with
and without DisCache.
2.4
Power-Up Sequence/Recalibration
This section explains the special features of the power-up sequence,
which is shown in Figure 2-15.
After RAM tests and circuit initialization, the drive can respond to
the SCSI bus, although the drive cannot read or write for several
seconds.
2-32

Quantum Q280 Specifications

General

Brand	Quantum
Model	Q280
Category	Storage
Language	English