Reset and power supply supervisor AN4488
14/50 AN4488 Rev 7
internal circuitry (no additional component needed, thanks to fully embedded reset
controller).
• When the internal reset is OFF, the following integrated features are no longer
supported:
– The integrated power-on reset (POR) / power-down reset (PDR) circuitry is
disabled.
– The brownout reset (BOR) circuitry must be disabled.
– The embedded programmable voltage detector (PVD) is disabled.
– VBAT functionality is no more available and V
BAT
pin should be connected to V
DD
.
Figure 5. NRST circuitry example (only for STM32F410xx, STM32F411xx,
STM32F412xx, STM32F413xx, STM32F423xx, STM32F446xx, STM32F469xx
and STM32F479xx)
Even with PDR_ON=0, during power up, the NRST is driven low by internal Reset controller
during T
RSTTEMPO
in order to allow stabilization of internal analog circuitry. Refer to
STM32F4xxxx datasheets for actual timing value.
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