Ublox ODIN-W2 Series User Manual

ODIN-W2 series - System integration manual
UBX-14040040 - R20 Design-in Page 26 of 43
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⚠ One exception is represented by High Impedance traces (such as signals driven by weak pull
resistors) that may be affected by crosstalk. For those traces, a supplementary isolation of 4w
from other busses is recommended.
3.6.1 General considerations for schematic design and PCB floor-planning
• Verify which signal bus requires termination and add series resistor terminations to the
schematics.
• Carefully consider the placement of the module with respect to antenna position and host
processor.
• Verify with PCB manufacturer allowable stack-ups and controlled impedance dimensioning.
• Verify that the power supply design and power sequence are compliant with ODIN-W2 series
module specification (refer to section 1.3).
3.6.2 Module placement
• Accessory parts like bypass capacitors should be placed as close as possible to the module to
improve filtering capability, prioritizing the placement of the smallest size capacitor close to
module pads.
⚠ Particular care should be taken not to place components close to the antenna area. The designer
should carefully follow the recommendations from the antenna manufacturer about the distance
of the antenna vs. other parts of the system. The designer should also maximize the distance of
the antenna to Hi-frequency busses like DDRs and related components or consider an optional
metal shield to reduce interferences that could be picked up by the antenna thus reducing the
module’s sensitivity.
• An optimized module placement allows better RF performance. See section 1.6 for more
information on antenna consideration during module placement.
☞ The heat dissipation during continuous transmission at maximum power can significantly raise
the temperature of the application baseboard below the ODIN-W2 series modules; Hence, avoid
placing temperature sensitive devices close to the module.
3.6.3 Layout and manufacturing
• Avoid stubs on high speed signals. Even through-hole vias may have an impact on signal quality.
• Verify the recommended maximum signal skew for differential pairs and length matching of
buses.
• Minimize the routing length; longer traces will degrade signal performance. Ensure that maximum
allowable length for high speed busses is not exceeded.
• Ensure that you track your impedance matched traces. Consult with your PCB manufacturer early
in the project for proper stack-up definition.
• RF and digital sections should be clearly separated on the board.
• Ground splitting is not allowed below the module.
• Minimize bus length to reduce potential EMI issues from digital busses.
• All traces (Including low speed or DC traces) must couple with a reference plane (GND or power),
Hi-speed busses should be referenced to the ground plane. In this case, if the designer needs to
change the ground reference, an adequate number of GND vias must be added in the area of
transition to provide a low impedance path between the two GND layers for the return current.
• Hi-Speed busses are not allowed to change reference plane. If a reference plane change is
unavoidable, some capacitors should be added in the area to provide a low impedance return path
through the different reference planes.
• Trace routing should keep a distance greater than 3w from the ground plane routing edge.

Ublox ODIN-W2 Series Specifications

General

Brand	Ublox
Model	ODIN-W2 Series
Category	Control Unit
Language	English