ODIN-W2 series - System integration manual
UBX-14040040 - R20 Appendix Page 38 of 43
C1-Public
B Checklist
B.1 Schematic checklist
No. Description Status
1. Reserved pins not connected.
2. Correct voltage level for all interfaces.
3. Verify the startup sequence.
4. Errata reviewed for all chips and modules.
5. VCC supply must be provided and stay within operating conditions.
6. External LPO_CLK must stay within operating conditions, if applied.
7. Check UART signal direction.
8. Provide proper precautions for ESD immunity as required on the application board.
Table 8: Schematic checklist
B.2 Layout checklist
No. Description Status
1. Avoid noise and crosstalk on LPO Clock routing.
2. Route power with trace wide enough to handle the power consumption of the ODIN-W2
module. Also avoid injecting noise on the power trace.
3. Avoid routing on the top layer underneath the ODIN-W2 module.
4. Make sure to add good grounding underneath the ODIN-W2 series module. Multiple GND
vias should be used both for thermal relief and grounding.
Table 9: Layout checklist