Xilinx Kintex-7 FPGA KC705 User Manual

KC705 Getting Started Guide www.xilinx.com 35
UG883 (v4.0.1) May 28, 2014
Advanced Bring-up Using the Base Targeted Reference Design
d. Vary the Packet Size parameters for the Raw Data Paths (see Figure 25) and click
Start Test. Then view the payload statistics to review data transfer rate on the
DMA channels. With a decrease in packet size, the performance drops.
Note:
Before changing packet size, click Stop Test, change the size, and then click
Start Test.
Note: For packet sizes equal to 64 or 128 bytes, the throughput is reduced and might not be
visible on the Payload Statistics tab. The exact values can be viewed on the System
Status tab.
X-Ref Target - Figure 25
Figure 25: Effect of Varying Packet Sizes on Performance
UG883_25_121112
Send Feedback

Xilinx Kintex-7 FPGA KC705 Specifications

General

Brand	Xilinx
Model	Kintex-7 FPGA KC705
Category	Motherboard
Language	English