ML505/ML506/ML507 Getting Started Tutorial www.xilinx.com 5
UG348 (v3.0.2) October 9, 2008
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Preface
About This Guide
The ML505/ML506/ML507 Getting Started Tutorial provides step-by-step instructions for
setting up and using the Virtex®-5 FPGA ML505, ML506, and ML507 Evaluation Platforms
(referred to as the ML50x board in this guide). The ML50x board comes with a number of
pre-installed demonstrations. This tutorial guides you through these demonstrations and
provides instructions to run them on the ML50x platforms.
Additional Documentation
The following documents are also available for download at
http://www.xilinx.com/virtex5
.
• Virtex-5 FPGA Family Overview
The features and product selection of the Virtex-5 family are outlined in this overview.
• Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
This data sheet contains the DC and Switching Characteristic specifications for the
Virtex-5 family.
• Virtex-5 FPGA User Guide
This user guide includes chapters on:
♦ Clocking Resources
♦ Clock Management Technology (CMT)
♦ Phase-Locked Loops (PLLs)
♦ Block RAM
♦ Configurable Logic Blocks (CLBs)
♦ SelectIO™ Resources
♦ SelectIO Logic Resources
♦ Advanced SelectIO Logic Resources
• Virtex-5 FPGA RocketIO™ GTP Transceiver User Guide
This guide describes the RocketIO GTP transceivers available in the Virtex-5 LXT and
SXT platforms.
• Virtex-5 FPGA RocketIO GTX Transceiver User Guide
This guide describes the RocketIO GTX transceivers available in the Virtex-5 FXT
platform.
• Embedded Processor Block in Virtex-5 FPGAs Reference Guide
This reference guide is a description of the embedded processor block available in the
Virtex-5 FXT platform.