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Xilinx Virtex-7 FPGA VC7203 User Manual
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Vir
te
x-7
FPGA VC7203
Characterization Kit IBER
T
Getting Star
ted Guide
Viv
ado Design Suite 2013.2
UG847 (v3.0) J
uly 10, 20
13
2
Table of Contents
Revision History
2
Table of Contents
3
Chapter 1: VC7203 IBERT Getting Started Guide
5
Overview
5
Requirements
6
Setting up the VC7203 Board
6
Extracting the Project Files
7
Running the GTX IBERT Demonstration
7
Connecting the GTX Transceivers and Reference Clocks
7
Attach the GTX Quad Connector
9
GTX Transceiver Clock Connections
10
GTX TX/RX Loopback Connections
11
Configuring the FPGA
12
Launching the Vivado Design Suite Software
14
Starting the Superclock-2 Module
16
Viewing GTX Transceiver Operation
22
Closing the IBERT Demonstration
23
Superclock-2 Frequency Table
23
Creating the GTX IBERT Core
26
Appendix A: Additional Resources
43
Xilinx Resources
43
Solution Centers
43
Further Resources
43
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Xilinx Virtex-7 FPGA VC7203 Specifications
General
Brand
Xilinx
Model
Virtex-7 FPGA VC7203
Category
Transceiver
Language
English
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