Xilinx Virtex-7 FPGA VC7203 User Manual

VC7203 IBERT Getting Started Guide www.xilinx.com 5
UG847 (v3.0) July 10, 2013
Overview
Chapter 1
VC7203 IBERT Getting Started Guide
Overview
This document provides a procedure for setting up the VC7203 Virtex®-7 FPGA GTX
Transceiver Characterization Board to run the Integrated Bit Error Ratio Test (IBERT)
demonstration using the Vivado® Design Suite. The designs that are required to run the
IBERT demonstration are stored in a Secure Digital (SD) memory card that is provided
with the VC7203 board. The demonstration shows the capabilities of the Virtex-7
XC7V485T FPGA GTX transceiver.
The VC7203 board is described in detail in VC7203 Virtex-7 FPGA GTX Transceiver
Characterization Board User Guide (UG957
).
The IBERT demonstrations operate one GTX Quad at a time. The procedure consists of:
1. Setting Up the VC7203 Board
2. Extracting the Project Files
3. Connecting the GTX Transceivers and Reference Clocks
4. Configuring the FPGA
5. Launching the Vivado Design Suite Software
6. Starting the SuperClock-2 Module
7. Viewing GTX Transceiver Operation
8. Closing the IBERT Demonstration

Xilinx Virtex-7 FPGA VC7203 Specifications

General

Brand	Xilinx
Model	Virtex-7 FPGA VC7203
Category	Transceiver
Language	English