Xilinx Virtex-7 FPGA VC7203 User Manual

VC7203 IBERT Getting Started Guide www.xilinx.com 29
UG847 (v3.0) July 10, 2013
Creating the GTX IBERT Core
6. In the Vivado IP Catalog window, open the Debug & Verification folder, then open the
Debug folder, and double-click IBERT 7 Series GTX (Figure 1-23).
X-Ref Target - Figure 1-22
Figure 1-22: Manage IP Settings
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Xilinx Virtex-7 FPGA VC7203 Specifications

General

Brand	Xilinx
Model	Virtex-7 FPGA VC7203
Category	Transceiver
Language	English