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Chapter 5 Counters
Figure 5-9 shows an example of an implicit buffered pulse measurement.
Figure 5-9. Implicit Buffered Pulse Measurement
Sample Clocked Buffered Pulse Measurement
A sample clocked buffered pulse measurement is similar to single pulse measurement, but a
buffered pulse measurement takes measurements over multiple pulses correlated to a sample
clock.
The counter performs a pulse measurement on the Gate. On each sample clock edge, the counter
stores the high and low ticks in the FIFO of the last pulse to complete. The STC3 transfers the
sampled values to host memory using a high-speed data stream.
Figure 5-10 shows an example of a sample clocked buffered pulse measurement.
Figure 5-10. Sample Clocked Buffered Pulse Measurement
Note If a pulse does not occur between sample clocks, an overrun error occurs.
For information about connecting counter signals, refer to the Default Counter/Timer Routing
section.
Semi-Period Measurement
In semi-period measurements, the counter measures a semi-period on its Gate input signal after
the counter is armed. A semi-period is the time between any two consecutive edges on the Gate
input.
Gate
Source
HL
42
HL
4
2
44
6
2
2
2
HL
4
2
4
4
6
2
HL
42
4
4
Buffer
Counter Armed
Counter
Armed
Gate
Source
HL
2
2
HL
22
3
3
Sample
Clock
S1
S2
Buffer
22 33
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