National Instruments PCI E Series Programmer's Manual

Chapter 5 Calibration
PCI E Series RLPM 5-2
© National Instruments Corporation
the clock bit. In other words, when setting the clock bit low, you must write
0 twice, and when setting it high, you must write 1 twice.
Note Review the timing diagram and specifications very carefully before attempting
to write code. Do not attempt to write to the EEPROM. If the factory area of the
EEPROM (the upper 128 bytes) is lost, the board can be rendered inoperable. In
this situation, you will have to send the board back to National Instruments to be
reprogrammed. National Instruments is
NOT
liable for such mistakes, and you will
have to bear the full expense of the RMA.
Figure 5-1. EEPROM Read Timing
Notice that because the CalDACs and the EEPROM share the same clock
and data in lines, it might seem that writing to the CalDACs could result in
accidental writes to the EEPROM. However, this is not true. A write cycle
to the EEPROM needs the chip select bit asserted. While writing to the
CalDACs, make sure that this bit is cleared. Clearing this bit ensures that
no writes to the EEPROM occur. It might also seem as though an access to
the EEPROM could result in an access to the CalDACs, but this is also not
true. The CalDACs update only when the LdCalDAC<2..0> bit is pulsed.
Tables 5-1 through 5-6 show a selected portion of the EEPROM map for
each of the boards. The upper 256 bytes are divided into two sections of
128 locations each. The uppermost 128 locations contain factory data. The
lower section of 128 locations contains the user calibration constants. There
are five user calibration constants sections that use a format identical to the
factory calibration section. These user areas start at location 371 in
the EEPROM.
EEPROMCS
SerClk
SerData
PROMOUT
A7 A6A8 A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0

National Instruments PCI E Series Specifications

General

Brand	National Instruments
Model	PCI E Series
Category	I/O Systems
Language	English