National Instruments PCI E Series Programmer's Manual

Chapter 3 Register Map and Descriptions
PCI E Series RLPM 3-16
© National Instruments Corporation
AO Configuration Register
The AO Configuration Register contains five bits that control the PCI E Series analog output
configuration. The contents of this register are cleared upon power up and after a reset
condition.
Address: Base address + 16 (hex)
Type: Write-only
Word Size: 16-bit
Bit Map:
Bit Name Description
15–9, Reserved Reserved—Always write 0 to these bits.
7–4
8 DACSel DAC Select—This bit indicates which DAC is the
destination for the configuration bits in this register.
DAC0 will be selected when this bit is cleared, and DAC1
will be selected when set.
3 GroundRef Ground Reference—This bit connects the reference for
both DACs to ground when this bit is set. This is useful for
calibration of the DAC linearity. This bit is not currently
implemented as a separate selection for the two DACs.
Therefore, its state is determined by the last value
written to this bit field. This bit is reserved on the
PCI-MIO-16XE-50, PCI-MIO-16XE-10, and PCI-6031E.
It should be set to 0.
2 ExtRef External Reference for DAC—This bit controls the
reference selection for the selected DAC. If this bit is set,
the reference used for the DAC is the external reference
voltage from the I/O connector. If this bit is cleared, the
internal +10 V
ref
is used for the DAC reference. This bit is
reserved on the PCI-MIO-16XE-50, PCI-MIO-16XE-10,
15 14 13 12 11 10 9 8
Reserved Reserved Reserved Reserved Reserved Reserved Reserved DACSel
7 6 5 4 3 2 1 0
Reserved Reserved Reserved Reserved GroundRef ExtRef ReGlitch BipDac

National Instruments PCI E Series Specifications

General

Brand	National Instruments
Model	PCI E Series
Category	I/O Systems
Language	English