Renesas RA Series User Manual

Renesas RA Microcontrollers EK-RA6M2 v1 – User's Manual
R20UT4578EU0102 Rev.1.02 Page 16 of 32
Jul.29.20
Table 4. DEBUG USB Connector (J11)
DEBUG USB Connector
EK-RA6M2
Pin
Description
Signal/Bus
1
+5VDC
+5V_JUSB
2
Data-
U2 USB_DM (U2-18)
3
Data+
U2 USB_DP (U2-19)
4
USB ID, jack internal switch, cable inserted
N.C.
5
Ground
GND
Three of the J-Link ports (P108, P109, and P300) are multiplexed with the SPI Fixed Pin Function on pin
header J1. To use these signals for the SPI function, the J-Link debug function must be disabled. Details of
the multiplexed signals are shown in the following table.
Table 5. J-Link Interface Conflicts
Programming Interface
Conflicting Interface
Port
Use
Interface
Use
P108
SWDIO/JTAG TMS
SPI
SSLB0 fixed function, J1-13
P109
SWO/JTAG TDO
SPI
MOSIB fixed function, J1-7
P300
SWCLK/JTAG TCK
GPT
GTIOC0A fixed function, J1-31
5.4.3 JTAG/SWD
A 10-pin Cortex
®
Debug Connector is provided at J10.
Table 6. JTAG Connector (J10)
JTAG Connector
EK-RA6M2
Pin
JTAG pin name
SWD pin name
Signal/Bus
1
VTref
VTref
+3V3
2
TMS
SWDIO
U1 P108/SWDIO (U1-51)
3
GND
GND
GND
4
TCK
SWCLK
U1 P300/SWCLK (U1-50)
5
GND
GND
GND
6
TDO
SWO
U1 P109 (U1-52)
7
Key
Key
N.C.
8
TDI
NC/EXTb
U1 P110 (U1-53)
9
GNDDetect
GNDDetect
N.C. (short E31 to connect to GND)
10
nSRST
nSRST
U1 RESET# (U1-38)
The Cortex
®
Debug Connector is fully described in the Arm
®
CoreSight
™
Architecture Specification.
The J-Link MCU Power Copper Jumper and J-Link Disconnects Copper Jumpers may be
open for proper operation of the JTAG interface to prevent interactions with the J-Link
MCU. See section 5.4.2, Debug USB for details.
If a JTAG adapter that properly interprets the Arm
®
Cortex 10-pin Debug Connector
assignment of pin 9 to GND is in use, the JTAG GNDDetect copper jumper E31 should be
closed. If the JTAG adapter used is one of several that may be confused or damaged by
the presence of GND at pin 9, E31 should be open (as shipped).
The J-Link
®
OB interface is multiplexed with the JTAG interface, and can collectively be referred to as the
Programming Interface. While the J-Link
®
OB interface and the JTAG interface do not conflict, the J-Link
®
OB signals may be isolated from the programming interface by changing the copper jumpers as described in
section 5.4.2, Debug USB.
Four of the JTAG ports (P108, P109, P110, and P300) are multiplexed with the SPI Fixed Pin function on pin
header J1. To use these signals for the SPI function, the J-Link debug function must be disabled. Details of
the multiplexed signals are shown in the following table.

Renesas RA Series Specifications

General

Brand	Renesas
Model	RA Series
Category	Microcontrollers
Language	English