Texas Instruments Jacinto 7 DRA829 User Manual

The current monitoring is enabled by default for all BUCKs and LDOs for the TPS6594-Q1 devices. Additionally,
Figure 3-1 shows that the MCU domain of the processor is powered by different power resources of the PMICs
than the main power domain of the processor.
GPIO_3 of the primary TPS6594-Q1 PMIC is configured as the SoC error signal monitor. Similar to the MCU
error signal monitor, this feature is enabled through I
2
C using the ESM_SOC_EN register bit. The SoC reset
functionality is supported through the connection of GPIO_11 on the primary TPS6594-Q1, configured as
nRSTOUT_SoC, to the PORz pin of the processor. The dedicated SoC reset and power supplies are to support
te MCU_ONLY mode and are independent of the ADIL target.
Table 4-1. System Level Safety Features
ASIL-B ASIL-D
Safety
Monitoring
Processor
External SW
Wdog
INTn
Safety MCU
Processing
ESM
Safety MCU
Reset
Safety Status
Signal with IO
Read-Back
feature
System Input
Voltage
Monitoring
SoC Main
Processing
ESM
IO Read-Back
Feature
SoC: MCU
Island
R5 Cores
PMICA: Q&A
Watchdog and
I2C2
PMICA1 and
PMICB2 : nINT
PMICA:
nERR_MCU
connected to
SOC:MCU_SAF
ETY_ERRz
PMICA:
nRSTOUT
connected to
MCU_PORz_1
V8
PMICA: ENDRV PMICA:
VSYS_SENSE -
OV with Safety
FET OVPGDRV
PMICA and
PMICB with
VCCA OV & UV
and SoC
(VMON1) -UV
PMICA:
nERR_SoC
connected to
SOC:
SOC_SAFETY_
ERRz
PMICA: nINT,
nRSTOUT,
nRSTOUT_SO
C
PMICB: nINT
1. PMICA = TPS65941213-Q1
2. PMICB = TPS65941111-Q1
Table 4-2. Power Monitoring Safety Features
ASIL-B ASIL-D Adds
Device Power Resource PDN Power Rail Safe State Power
Group1
Supply Voltage
Monitoring
Supply Current
Monitoring
Residual Voltage
Monitoring
TPS65941213-Q1
(PMIC-A)
BUCK1-3 VDD_CPU_AVS SOC PMIC-A - OV &
UV
PMIC-A -CM PMIC-A -RVM
BUCK4 VDD_MCUIO_0V8 MCU PMIC-A - OV &
UV
PMIC-A -CM PMIC-A -RVM
BUCK5 VDD_PHY_1V8 SOC PMIC-A - OV &
UV
PMIC-A -CM PMIC-A -RVM
LDO1 VDD1_LPDDR4_1
V8
SOC PMIC-A - OV &
UV
PMIC-A -CM2 PMIC-A -RVM
LDO2 VDD_MCUIO_1V8 MCU PMIC-A - OV &
UV
PMIC-A -CM PMIC-A -RVM
LDO3 VDA_DLL_0V8 SOC PMIC-A - OV &
UV
PMIC-A -CM PMIC-A -RVM
LDO4 VDA_MCU_1V8 MCU PMIC-A - OV &
UV
PMIC-A -CM PMIC-A -RVM
Supporting Functional Safety Systems www.ti.com
14 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto
™
7 DRA829 or
TDA4VM Automotive PDN-0C
SLVUC99 – JANUARY 2022
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated

Texas Instruments Jacinto 7 DRA829 Specifications

General

Brand	Texas Instruments
Model	Jacinto 7 DRA829
Category	Computer Hardware
Language	English