Clevo W950BU User Manual

Schematic Diagrams
B - 6 Skylake ULT LPC/SPI/SMB
B.Schematic Diagrams
Skylake ULT LPC/SPI/SMB
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Co_Lay
婳㬋側䔲
SPI_* = 1.5"~6.5"
BIOS+ME ROM
64Mbit
3.3V_SPI
ON
^,KZd
TLS Confidentiality
LOW = Disable Intel ME
Crypto TLS (Default)
GPP_C2
HIGH =Enable Intel ME
Crypto TLS
STRAP PIN
eSPI or LPC
LOW = LPC Is selected for EC
(Default)
GPP_C5
HIGH=eSPI Is selected for EC
PCH_GPP_D21
TPM Type Detect
HIGH = TPM
PCH_SPI_DQ2
SPI_CS0#
SPI_SO
SPI_SCLK
PCH_SPI_DQ3
SPI_SI_R
SPI_SO_R
CL_RST#1
SMB_CLK_DDR
SMB_DATA
SMB_CLK_DDR
SMB_DATA
SMB_CLK
SMB_DAT_DDR
SMB_DAT_DDR
SPI_SCLK_R
SPI_SI
SPI_SI_M SPI_SI
SPI_WP#_0
SPI_HOLD#_0
SPI_CS0#
SPI_SO_M
SPI_SCLK_M SPI_SCLK
PCH_GPP_C2
SMB_DATA
SMB_CLK
SML0CLK
SML0DATA
PCH_GPP_B23
SML1DATA
SML1CLK
SPI_SO
SPI_CS_0#
PCH_GPP_C5
SMB_CLK
CL_CLK1
CL_DATA1
SPI_SCLK_R
SPI_CS_0#
SPI_SI_R
SPI_SO_R
PCH_SPI_DQ2
PCH_SPI_DQ3
PCH_GPP_B23
SMB_CLK
SMB_DATA
PCH_GPP_C5
SML1DATA
SML1CLK
SML0DATA
SML0CLK
PCH_GPP_C2
PM_CLKRUN#
PM_CLKRUN#
LPC_1
LPC_0
SERIRQ
SERIRQSB_KBCRST#_R
SB_KBCRST#_R
TPM_DET#
SPI_HOLD#_0
SPI_WP#_0
3.3VA
3.3V_SPIVDD3
3.3VS
3.3V_SPI
3.3VS
3.3VS
LPC_FRAME# 22,23
CL_RST#120
RTCVCC4,10
1.0VS2,4,9,26,29,30
VDD32,4,6,7,10,18,20,23..31
3.3VS2,4,6..8,13..26,28,32
GPG223
3.3V_SPI10
HSPI_SCLK23
HSPI_CE#23
HSPI_MSI23
HSPI_MSO23
CL_CLK120
CL_DATA120
SMB_CLK_DDR 13,14
SMB_DAT_DDR 13,14
LPC_AD0 22,23
LPC_AD1 22,23
LPC_AD2 22,23
LPC_AD3 22,23
SMB_CLK 22,24
SMB_DATA 22,24
S4_STATE# 22
PM_CLKRUN# 22
PCLK_TPM 22
PCLK_KBC 23
SERIRQ22,23
SB_KBCRST#23
3.3VA2,4,6..8,10,23,26,29
Title
Size Document Number Rev
Date: Sheet
of
1.0
[05] KBL ULT LPC/SPI/SMB
A3
538W ednesday, August 24, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-7P-W94J3-003
6-71-W94J0-D02B
Title
Size Document Number Rev
Date: Sheet
of
1.0
[05] KBL ULT LPC/SPI/SMB
A3
538W ednesday, August 24, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-7P-W94J3-003
6-71-W94J0-D02B
Title
Size Document Number Rev
Date: Sheet
of
1.0
[05] KBL ULT LPC/SPI/SMB
A3
538W ednesday, August 24, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-7P-W94J3-003
6-71-W94J0-D02B
R406
*2.2K_04
R93 *1K_04
R110 *499_1%_04
R95
1K_1%_04
R462 *100K_04
S D
G
Q10B
*MTDK5S6R
5
3 4
R101 *1K_04
R395*10mil_04
R237 22_04
R49 10K_04
R405*10mil_04
R414 *499_1%_04
Q12
*MTP3403N3
G
DS
R433 15_1%_04
C335
*1u_6.3V_X5R_04
U21
EN25QH64
PCB Footprint = ACA-SPI-004-T03
CE#
1
SO
2
WP#
3
VSS
4
SI
5
SCK
6
HOLD#
7
VDD
8
R61*10mil_04
R409*10mil_04
R219 *10K_04
R114 *100K_04
C82
0.1u_16V_Y5V_04
R415 15_1%_04
R292 *1K_04
R461
*1M_04
R398*10mil_04
R108 15_1%_04
R37 15_1%_04
R437*10mil_04
R418 *10K_04
R424 *10K_04
R107 15_1%_04
R112 1K_04
R82 *10K_04
PJ11
*OPEN-1mm
12
R417*10mil_04
R407 0_04
R400*10mil_04
R421 0_04
C333
*0.1u_16V_Y5V_04
R420
*2.2K_04
R48 8.2K_04
C337
*0.1u_16V_Y5V_04
S D
G
Q10A
*MTDK5S6R
2
6 1
SKL_ULT
SPI - FLASH
SMBUS, SMLINK
SPI - TOUCH
C LINK
LPC
?
?
5 OF 20
REV = 1
U55E
KBL_ULT/BGA
SPI0_CLK
AV2
SPI0_MISO
AW3
SPI0_MOSI
AV3
SPI0_IO2
AW2
SPI0_IO3
AU4
SPI0_CS0#
AU3
SPI0_CS1#
AU2
SPI0_CS2#
AU1
GPP_D1/SPI1_CLK
M2
GPP_D2/SPI1_MISO
M3
GPP_D3/SPI1_MOSI
J4
GPP_D21/SPI1_IO2
V1
GPP_D22/SPI1_IO3
V2
GPP_D0/SPI1_CS#
M1
CL_CLK
G3
CL_DATA
G2
CL_RST#
G1
GPP_A0/RCIN#
AW13
GPP_A6/SERIRQ
AY11
GPP_C0/SMBCLK
R7
GPP_C1/SMBDATA
R8
GPP_C2/SMBALERT#
R10
GPP_C3/SML0CLK
R9
GPP_C4/SML0DATA
W2
GPP_C5/SML0ALERT#
W1
GPP_C6/SML1CLK
W3
GPP_C7/SML1DATA
V3
GPP_B23/SML1ALERT#/PCHHOT#
AM7
GPP_A1/LAD0/ESPI_IO0
AY13
GPP_A2/LAD1/ESPI_IO1
BA13
GPP_A3/LAD2/ESPI_IO2
BB13
GPP_A4/LAD3/ESPI_IO3
AY12
GPP_A5/LFRAME#/ESPI_CS#
BA12
GPP_A14/SUS_STAT#/ESPI_RESET#
BA11
GPP_A9/CLKOUT_LPC0/ESPI_CLK
AW9
GPP_A10/CLKOUT_LPC1
AY9
GPP_A8/CLKRUN#
AW11
R109
1K_1%_04
R151 22_04
Q15
*MTN7002ZHS3
G
DS
R402 1K_04
R403*10mil_04
Sheet 5 of 39
Skylake ULT LPC/
SPI/SMB

Clevo W950BU Specifications

General

Brand	Clevo
Model	W950BU
Category	Laptop
Language	English