NJU72340A (DIGITAL : IC761)
Terminal Functions
SN74CBT3251PWR (DIGITAL : IC723)
Block diagram
SN74CBT3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
SCDS019L − MAY 1995 − REVISED JANUARY 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5-Ω Switch Connection Between Two Ports TTL-Compatible Input Levels
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
B4
B3
B2
B1
A
NC
OE
GND
V
CC
B5
B6
B7
B8
S0
S1
S2
D, DB, DBQ, OR PW PACKAGE
(TOP VIEW)
NC − No internal connection
RGY PACKAGE
(TOP VIEW)
1 16
89
2
3
4
5
6
7
15
14
13
12
11
10
B5
B6
B7
B8
S0
S1
B3
B2
B1
A
NC
OE
B4
S2
V
GND
CC
NC − No internal connection
description/ordering information
The SN74CBT3251 is a 1-of-8 high-speed TTL-compatible FET multiplexer/demultiplexer. The low on-state
resistance of the switch allows connections to be made with minimal propagation delay.
When output enable (OE
) is low, the SN74CBT3251 is enabled. S0, S1, and S2 select one of the B outputs for
the A-input data.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY Tape and reel SN74CBT3251RGYR CU251
SOIC − D
Tape and reel SN74CBT3251DR
CBT3251
−40°C to 85°C
SSOP − DB Tape and reel SN74CBT3251DBR CU251
SSOP (QSOP) − DBQ Tape and reel SN74CBT3251DBQR CU251
TSSOP − PW
Tape and reel SN74CBT3251PWR
CU251
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright © 2004, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN74CBT3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
SCDS019L − MAY 1995 − REVISED JANUARY 2004
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
(each multiplexer/demultiplexer)
INPUTS
OE S2 S1 S0
FUNCTION
L L L L A port = B1 port
L L L H A port = B2 port
L L H L A port = B3 port
L L H H A port = B4 port
L H L L A port = B5 port
L H L H A port = B6 port
L H H L A port = B7 port
L H H H A port = B8 port
H X X X Disconnect
logic diagram (positive logic)
B5
B1
A
B2
B3
B4
B6
B7
B8
OE
S0
S1
S2
5
7
11
10
9
4
3
2
1
15
14
13
12
Before Servicing
This Unit
Electrical Mechanical Repair Information Updating
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General
Weight and Dimensions
