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3-3 PLL CIRCUITS
3-3-1 GENERAL
Each receiver and transmitter circuit has an independent
PLL circuit for controlling frequencies. All PLL circuits are
shielded and installed on the RX and TX units.
PLL circuits steadily oscillate the transmit frequency and the
receive local frequency. The PLL output frequency is con-
trolled by divided ratio (N-data) of the programmable divider.
3-3-2 RECEIVER PLL CIRCUIT (RX UNIT)
The PLL IC (IC4) which includes in the prescaler, the pro-
grammable counter and the phase comparator generates
the 1st LO frequency with the VCO circuit (RVCO unit; Q1,
D1–D4). The PLL IC sets the divided ratio which bases on
N-data from the CPU (LOGIC unit; IC33) to control the pro-
grammable counter. The PLL IC compares a phases of the
VCO signal with the reference oscillator frequency, and is
then applied to the VCO circuit (RVCO unit; Q1, D1–D4).
3-3-3 RECEIVER REFERENCE OSCILLATOR
CIRCUIT (RX UNIT)
The 12.8 MHz reference frequency is produced by the oscil-
lator (X3). The frequency is adjusted by the D/A converter IC
(LOGIC unit; IC25). The reference frequency is applied to
the PLL IC (IC4, pin 1).
3-3-4 RECEIVER VCO CIRCUIT (RVCO UNIT)
The VCO circuit (D1–D4, Q1) generates the receive fre-
quency. The signal is applied to the buffer amplifier (Q2),
and is applied to the PLL IC (RX unit; IC4). The signal is
amplified at the buffer amplifiers (RX unit; Q8, Q9), and is
then applied to the 1st mixer circuit (RX unit; IC1) as 1st LO
signal.
A part of the signal is applied to the PLL IC (RX unit; IC4) via
the amplifier (RX unit; Q14) as RX PLL lock voltage.
3-3-5 TRANSMITTER PLL CIRCUIT (TX UNIT)
The PLL IC (IC2) which includes in the prescaler, the pro-
grammable counter and the phase comparator. The PLL IC
sets the divided ratio which bases on N-data from the CPU
(LOGIC unit; IC33) to control the programmable counter.
The PLL IC compares a phases of the VCO signal with the
reference oscillator frequency, and is then applied to the
VCO circuit (TVCO unit; Q1,D1–D4).
3-3-6 TRANSMITTER REFERENCE OSCILLATOR
CIRCUIT (TX UNIT)
The 12.8 MHz reference frequency is produced by the oscil-
lator (X1). The frequency is adjusted by the D/A converter
IC (IC5, pin 14). The reference frequency is applied to the
PLL IC (IC2, pin 1).
3-3-7 TRANSMITTER VCO CIRCUIT (TVCO UNIT)
The VCO circuit (Q1, D1–D4) generates the transmit fre-
quency. The signal is applied to the buffer amplifier (Q2) and
is then applied to the PLL IC (TX unit; IC2) and buffer ampli-
fier (TX unit; Q1, Q2). The amplified signal is applied to the
PA unit.
A part of the signal is applied to the PLL IC (TX unit; IC4) via
the amplifier (TX unit; Q3) as TX PLL lock voltage.
3-4 OTHER CIRCUITS
3-4-1 TELEPHONE IF CIRCUIT (LOGIC UNIT)
The signals from the telephone line (FRONT, J13) are
applied to the ringer detect circuit (C100, C103, C375,
R131, D1, D5, R143, R145, IC48). The detected signals are
applied to the CPU (IC33, pin 73) via “RING” line. The
“HOOKC” signal from the CPU (IC33, pin 72) and the “DP”
signal from IC47 are applied to the hook switch (RL1, RL2)
to off-hook.
Received AF signals from the RX unit pass through the high-
pass filter, de-emphasis and low-pass filter circuits. The fil-
tered AF signals are amplified at IC7 and are then applied to
the network IC (IC46, pin 16) via “T6” signal. The output sig-
nals from IC46 are applied to the J13 (FRONT unit).
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