Keithley 2002 Repair Manual

Troubleshooting
2-96
2.11.25 Frequency tests
The 412 series is a 10-phase frequency test. The first three phases set up the ASIC U816 on the
A/D board to internally read frequency. The setup of the ASIC is accomplished by data from
shift register U811. The second two tests are iterative tests that occur 85 times to create a mock
frequency for the ASIC to read. The remaining tests are intended to stop the ASIC from reading
frequency, and to allow the internal counts to be acquired by the digital circuitry. Again, this is
done by data from the shift register U811. There is only one error message at the end of the last
phase of the Frequency test series. Most of the ACV circuitry that is used to generate this test
has been tested in previous 400 series tests.
Test 412.1 — Frequency, phase 1
Type
Circuit Exercise
Fault message None
Description The shift registers U809, U810, and U811 on the A/D are set to all lows to begin to set up the
U816 ASIC to read frequency. The reference (REFHI) is generated by U219 and associated cir-
cuitry and buffered by U255. The buffered output of U255 is REFBUF, which is connected to a
buffer in U420 with output BUFF. BUFF is connected to R493, and depending on whether Q425
is on or off, BUFF or common will be connected to relay K403. The SELFTESTEN line to U415
arms the gate for the SELFTEST signal. When SELFTEST is changed from high to low, the out-
put of U415 switches Q425 off and then on. The signal path for the resulting common or BUFF
generated by Q425 switching is through K403, K401, protection Q410, 424, 420, 415, and con-
nected to Q421. The SELFTEST control line is low in the first test so the signal will be common.
ACLOW with a logic low turns Q421 ON, and the signal is connected to buffer Q418 with output
AMP IN. AMP IN is monitored by the non-inverting X1 gain path through Q412 to Q411 and
U417.
This section is only one-half of the non-inverting path, and NETOUT is the applied signal in-
verted. The output NETOUT is connected to the Zero Crossing circuit. The PRECOMP+ output
from U433 and U430 is selected with the SEL line, and the output value is set by the TRIG lines.
The value for this test is set at 2.25V positive and connects to the Zero Crossing circuit through
U418 pin 14 to 15 with control line TRIGLEV low. The PRECOMP+ signal to the Zero Crossing
circuit is an offset used to make the switching in the following tests look like the signal is cross-
ing zero. U416 of the Zero Crossing circuit generates the COMP- signal depending on the input
NETOUT polarity and the offset created by PRECOMP+. COMP- is connected to comparator
U408 and the Q and NOT Q outputs configure the signal path of AMP IN. The NOT Q output is
also connected to U409 pin 12. When the FREQ line is high, it arms gate U409. When the Zero
Crossing circuit and comparator U408 change the NOT Q line due to the monitoring of the input
signal at NETOUT, the FREQ_OUT line will change. FREQ_OUT is connected to the A/D, and
the changing states are counted as a frequency.
The following tests are all set up the same except the SELFTEST line is toggled to switch to
common. The remaining circuit path is put in the test for the ease of monitoring the signal
switching. The A/D is not reading the A/D_IN line. The output is connected to pin 12 of U414
and switched to the input of buffer U403. Output of U403 is ACV/A and is connected to pin 10
of U222. U222 is set up to switch ACV/A input to the A/D buffer U226. U226 is set up for X1
gain through U227 pin 2 to 3 with /X1 pin 1 low.
Drawing reference Analog Board; 2002-100
A/D Converter; 2002-160

Keithley 2002 Specifications

General

Brand	Keithley
Model	2002
Category	Multimeter
Language	English