Circuit Descriptions
EN 43QFU1.1E LA 7.
2012-Sep-14
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7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Supply
7.3 General Power Architecture
7.4 Back-End Processing
Notes:
•Only new circuits (circuits that are not published recently)
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions.
• For a good understanding of the following circuit
descriptions, please use the wiring-, block- (see chapter
9. Block Diagrams
) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts
). Where
necessary, you will find a separate drawing for clarification.
7.1 Introduction
The QFU1.1E LA chassis is part of the FUSION platform and
covers sets in the 69xx, 7xxx, 8xxx and 9xxx range.
7.1.1 FUSION 2011 Architecture Overview
For details about the chassis block diagrams refer to
chapter 9. Block Diagrams
. An overview of the FUSION 2012
architecture can be found in Figure 7-1
and Figure 7-2.
Figure 7-1 Architecture of FUSION platform 2012 (69xx, 7xxx, 8xxx range)
USB
HUB
64/48
DDR 1GB
4 × 2Gb
FLASH
1GB
DVBC/T2
DVB-S2
Tuner
DVB-S2
Hybrid
Tuner
HDMI
9385
CI+
ETH
PHY
USB
DVB-T/C
ISDB-T
Analogue
NVM
Skype
Analogue
Inputs
USB
NR
DEI
PQ Enhancement
FRC
3D: Active
2D-3D conversion
Cell
FHD@240
CIN@240
8 × V-by-1 RGB
BL
3D
Backlight
8 ×
PWM
3D goggle drive
FPGA
Spartan 6
LX4
BL-PWM
BL-I-CTRL
3D_LR
-LED
3D-IR
19210_064_120504.eps
120504
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