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Pulse Generator
PG 508
Tektronix PG 508 User Manual
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pulse
is
slow
e
n
oug
h
so
t
h
at
t
h
e
D
i
np
ut
of
fli
p
flop
U
720A
h
as
not
reac
h
e
d
t
h
e
h
ig
h
level
w
h
en
t
h
e
pulse
at
t
h
e
cloc
k
te
rm
i
n
al
(p
i
n
6)
of
fli
p
flo
p
U
720A
goes
h
ig
h
(lea
d
ing
p
o
r
tio
n
of
t
h
e
n
ext
p
ulse
drivi
n
g
t
h
e
tra
n
sitio
n
circuitry)
t
h
e
0
termi
n
al,
p
i
n
3,
of
fli
p
flo
p
U
720A
goes
h
ig
h
.
T
h
is
h
ig
h
is
connected
to
t
h
e
set
termi
n
al,
p
i
n
12,
of
U
720
B
causing
t
h
e
1
terminal
of
U
720
B
to
go
h
ig
h
illuminating
t
h
e
CO
NT
R
O
L
ERR
O
R
lig
h
t
.
T
h
e
on
time
an
d
reset
fort
h
is
error
i
n
dicati
n
g
mode
now
p
rocee
d
s
as
previously
d
escribed
.
L
evel
Co
n
trol
M
ulti
p
lier
T
h
is
circuitry
p
rovides
i
n
de
p
e
n
de
n
t
to
p
a
n
d
bottom
level
co
n
trol
of
t
h
e
out
p
ut
p
ulse
by
controlling
t
h
e
am
p
litu
d
e
a
nd
offset
of
t
h
e
d
rive
sig
n
al
to
t
h
e
li
n
ear
outp
u
t
am
p
lifier
.
Also
i
n
clu
d
ed
is
circuitry
to
accom
p
lis
h
t
h
e
n
ormal
com
p
leme
n
t
functio
n
a
n
d
t
h
e
p
reset
fu
n
ction
.
Co
n
t
r
ol
voltage
clam
p
s
to
e
n
sure
t
h
e
out
p
ut
amplifier
is
n
ot
over
d
rive
n
are
also
p
rovi
d
ed
.
Am
p
litu
d
e
co
n
trol
of
t
h
e
sig
n
al
occurs
i
n
t
h
e
a
n
alog
multi
p
lier,
U
850
.
T
h
e
p
ulse
sig
n
al
p
rovi
d
es
t
h
e
Χ
i
np
ut,
a
nd
th
e
level
control
voltages
p
rovide
t
h
e
Υ
in
p
ut
.
T
h
e
Χ
-
Υ
p
roduct
of
t
h
ese
i
np
uts
is
co
n
verte
d
to
α
d
rive
curre
n
t
for
t
h
e
out
p
ut
am
p
lifier
.
I
np
ut
a
n
d
com
p
lement
p
ulses
from
t
h
e
varia
b
le
tra
n
si-
tion
time
ge
n
erator
are
a
pp
lied
to
t
h
e
bases
of
Q825
and
Q840
.
T
h
ese
tra
n
sistors
form
α
d
iffere
n
tial
am
p
lifie
r
,
su
pp
lied
by
co
n
stant
curre
n
t
source
U
800
B
a
n
d
Q820
.
Α
p
ositive-going
sig
n
al
at
t
h
e
base
of
Q825,
wit
h
t
h
e
complementary
(negative-goi
n
g)
sig
n
al
at
t
h
e
base
of
Q840
causes
t
h
e
sig
n
al
curre
n
tat
p
i
n
11
of
t
h
e
multiplierto
go
negative
an
d
t
h
e
signal
current
at
pin
12
to
go
positive
.
Wh
en
t
h
e
pulse
p
olarity
reverses,
at
t
h
e
b
ases
of
0825
an
d
Q840,
t
h
e
sig
n
al
curre
n
t
also
reverses
polarity
at
pins
11
a
n
d
12
.
T
h
e
difference
between
t
h
e
currents
at
p
ins
11
an
d
12
corres
p
o
nd
s
to
t
h
e
Χ
sig
n
al
i
np
ut
for
t
h
e
multi
p
lier
.
T
h
e
total
curre
n
t
flowing
from
pins
2
an
d
3
of
U
850
is
essentially
e
q
ual
to
t
h
e
current
req
u
ire
d
by
t
h
e
constant
current
source,
U
895A
an
d
Q900
.
H
owever,
t
h
e
d
ifference
in
currents
between
t
h
ese
pins
corresponds
to
t
h
e
Υ
input
signal
for
t
h
e
multiplier
.
T
h
e
am
p
litu
d
e
differe
n
ce
of
t
h
ese
curre
n
ts
is
co
n
t
r
olle
d
by
U
895
B
.
This
is
α
do
differential
am
p
lifier
w
h
ic
h
am
p
lifies
t
h
e
differe
n
ce
betwee
n
t
h
e
h
ig
h
&
low
level
control
voltages
to
prod
u
ce
t
h
e
Υ
i
np
ut
sig
n
al
.
Gai
n
ad
j
ust
m
e
n
t
for
t
h
e
Υ
input
sig
n
al
is
provide
d
b
y
R
885
.
T
h
e
h
ig
h
a
nd
low
level
co
n
trol
voltages
a
r
e
d
etermine
d
by
t
h
eir
respective
front
panel
co
n
trols,
R
770
B
a
n
d
R
770A
.
If
t
h
e
preset
function
is
selecte
d
,
t
h
e
preset
h
ig
h
an
d
preset
low
potentio
m
eters,
R
775
and
R
785,
p
rovi
d
e
t
h
e
T
h
eory
of
Operation--PG
508
co
n
trol
voltages
.
T
h
esevoltages
are
buffere
d
b
y
u
n
ity
gai
n
am
p
lifiers
U
780A
a
nd
U
780
B
.
B
ot
h
co
n
trol
voltages
ra
n
ge
betwee
n
0
a
nd
-
Ι
--5
.2
V
.
Wh
e
n
t
h
e
co
n
trol
voltages
a
r
e
e
q
ual,
t
h
e
Υ
i
n
put
is
zero
a
n
d
t
h
e
m
ultiplier
sig
n
al
out
p
ut
(X-Y)
e
qu
als
zero
.
Α
differe
n
ce
of
-42
.6
V
b
etwee
n
t
h
e
h
ig
h
a
nd
low
level
co
n
trol
voltages
correspo
n
ds
to
maximum
out
p
ut
am
p
litu
d
e
from
t
h
e
p
ulse
ge
n
erator
.
T
h
e
n
ormal
complement
switc
h
inverts
t
h
e
level
co
n
trol
voltage
i
n
p
uts
to
differential
am
p
lifier
U
895
B
.
H
owever,
si
n
ce
t
h
e
differe
n
ce
betwee
n
t
h
e
voltages
is
u
n
c
h
ange
d
,
t
h
e
control
voltage
i
np
ut
sig
n
al
h
as
co
n
sta
n
t
amplitu
d
e,
but
reverses
polarity
.
T
h
is
com
p
lements
t
h
e
pulse
generator
outp
u
t
.
T
h
e
normal
com
p
leme
n
t
bala
n
ce
a
d
-
j
ustment,
R
910,
ensures
t
h
at
t
h
e
Υ
multiplier
inp
u
t
respon
d
s
equally
to
c
h
anges
in
eit
h
er
t
h
e
h
ig
h
or
low
level
control
voltages
.
T
h
e
signal
current
at
p
ins
5
and
6
of
U
850
is
t
h
e
pu
lse
signal
.
Since
Q845,
in
con
j
u
n
ctio
n
wit
h
U
800
B
,
p
rovides
α
co
n
sta
n
t
current
si
nk
,
t
h
e
cur
r
e
n
t
t
hr
oug
h
R
954,
from
t
h
e
emitter
of
commo
n
base
stage
Q954,
also
contains
signal
cu
r
re
n
t
variations
.
T
h
e
cur
r
e
n
t
d
rive
r
for
t
h
e
out
p
ut
amplifier
is
Q954
.
T
h
e
sig
n
al
curre
n
ts
i
n
to
p
i
n
s
8a
n
d
9
of
U
850
also
co
n
tai
n
t
h
e
p
ulse
signal
.
H
owever
co
n
sta
n
t
curre
n
t
si
nk
R
847,
a
n
d
commo
n
b
ase
stage
Q950
a
r
e
inclu
d
e
d
only
as
α
bala
n
cing
t
h
ermal
loa
d
for
t
h
e
mul-
ti
p
lier
.
To
obtai
n
i
n
depe
n
dent
co
n
trol
of
t
h
e
output
p
ulse
h
ig
h
a
n
d
low
levels,
t
h
e
co
n
trol
voltages
are
average
d
by
resistor
n
etwor
k
R
914,
R
915,
R
918
a
nd
R
920
.
H
ig
h
a
n
d
L
ow
trac
k
i
n
g
potentimeters,
R
915
an
d
R
920,
are
a
d
-
j
ustable
to
provi
d
e
minimum
interaction
betwee
n
p
ulse
levels
.
T
h
e
d
o
voltage
from
t
h
is
n
etwor
k
,
along
wit
h
t
h
e
voltage
from
t
h
e
offset
ad
j
ustment
R
925,
is
summe
d
an
d
inverte
d
b
y
U
930A
.
U
930
B
proves
furt
h
er
gain
an
d
level
s
h
ifting
an
d
,
i
n
con
j
unction
wit
h
Q945,
serves
as
α
level
controlle
d
offset
generator
.
Α
d
o
current
sou
r
ce
to
t
h
e
collector
of
0954
is
provi
d
e
d
by
Q945
.
T
h
e
collector
of
Q954
is
t
h
e
virt
u
al
ground
inp
u
t
to
t
h
e
o
u
tput
amplifier
.
Wh
e
n
t
h
e
h
ig
h
a
nd
low
level
control
potentiometers
are
bot
h
at
mi
d
ra
n
ge
(-42
.6
V
zero
out
pu
t)
Q945
sources
all
t
h
e
quiescent
bias
current
required
b
y
Q954,
w
h
ic
h
is
a
pp
roximately
15
m
A
.
T
h
erefore,
t
h
ere
is
no
curre
n
t
d
rive
to
t
h
e
out
p
ut
am
p
lifier
t
h
roug
h
R
975
or
R
1055
.
If
t
h
e
h
ig
h
level
control
is
t
u
rned
fully
cw
(maximum
o
u
t
put),
t
h
e
low
level
control
voltage
remains
at
+2
.6
V
.
T
h
e
h
ig
h
level
control
voltage
i
n
creases
to
+-5
.2
V
.
T
h
is
causes
t
h
e
voltage
output
of
U
930A
to
decrease,
causi
n
g
t
h
e
offset
generator
U
930
B
a
nd
Q945
to
sou
r
ce
ap
p
roximately
20
mA
.
T
h
is
is
an
i
n
crease
of
5
mA
.
T
h
is
d
iffere
n
ce
i
n
co
n
trol
voltage
setti
n
gs
also
causes
maximum
d
ifference
in
t
h
e
co
n
trol
voltage
i
np
ut
sig
n
al
to
t
h
e
multiplier
.
This
action
also
causes
10
mA
p
ea
k
to
p
ea
k
sig
n
al
curre
n
t
variations
in
t
h
e
collector
current
of
Q954
.
Si
n
ce
t
h
e
sig
n
al
curre
n
t
18
20
Table of Contents
Formation
3
Table of Contents
3
N St Ru Men T Description
5
Installation an D R Emoval
5
P Eriod an D du Ration Selection
6
D Uty Facto Rs
6
Delayed and P Ai Red P Ulse Selection
6
Tra N Sition Time Selection
7
Output L Evels
7
Trigger Output
8
Manual Trigger
8
CO NTROL ERROR Ligh T
8
Output Terminations and Co Nnections
8
Syste Ms
9
E Xter N al Voltage Co Ntrol
9
Defi Nitio Ns of P Ulse Characteristics
12
I Ntroduction
15
TRIG'D/GATED L Ig H T CI Rc U It Ry
15
Trigge R Ed M O de
15
Input CI Rcuitry
15
P Eriod Generator
16
Delay Ge Nerator
16
Duration Generator
16
D Uratio N and Delay con Trol E Rro R Lig H T
17
CI R C U It Ry
18
L Evel Co Ntrol M Ulti Plier
19
Output Amplifier
20
P Ower S Upply
20
P G
22
E Ctio N
22
Table of Contents
98
Introduction
101
Operating Instructions
102
Instrument Description
102
Installation and Removal
102
Controls and Connectors
102
Basic Operation
103
Period and Duration Selection
103
Duty Factors
103
Delayed and Paired Pulse Selection
103
Locations of Period, Delay and Duration
103
External Triggering and Gating
104
Transition Time Selection
104
Location for Transition Custom Timing
104
Control Error Light
105
Manual Trigger
105
Operating Considerations
105
Output Termination's and Connections
105
Trigger Output
105
Connections
106
Counted Burst Using the DD
106
External Voltage Control
106
Risetime Measurements in Linear Systems
106
Equivalent Circuit of External Input for Output
106
Location of Trigger Jumpers in DD 501 for
107
Repetition Rate
108
Definitions of Pulse Characteristics
109
Pulse Characteristics
109
Specifications
110
Environmental Requirements
112
Using the Rear Interface Connectors
113
Voltage Control
113
Locations for User Installed Rear Interface
113
Connections
113
Theory of Operation
115
Introduction
115
Input Circuitry
115
TRIG'D/GATED Light Circuitry
115
Triggered Mode
115
Period Generator
116
Delay Generator
116
Duration Generator
116
Capacitor
116
Light Circuitry
117
Variable Transition Time Circuitry
117
Transition Time Control Error Light Circuitry
117
Simplified Schematic for Control Error Indicator Logic with Control Settings Causing Illumination
118
Level Control Multiplier
119
Output Amplifier
120
Power Supply
120
Service Information
122
Symbols and Reference Designators
122
Adjustments
123
Maintenance
123
Circuit Board Removal
123
Test Equipment
123
General
123
Replaceable Mechanical Parts List
124
Installation Procedure
131
Tm 503 Operating Instructions
133
Introduction
133
Powering up
133
Building a System
135
Specifications
136
General
137
Tm 503 System Maintenance
137
Block Diagram
138
Troubleshooting Aids
138
Troubleshooting Techniques
138
Parts Replacement
140
Diagrams and Circuit Board Illustrations
144
Power Module Interface Pin Assignments
145
Detailed Block Diagram
146
Replaceable Mechanical Parts
147
Appendix B References
152
Introduction
153
Scope
153
General
153
Explanation of Columns
153
Components of End Item
154
Basic Issue Items
155
Appendix E Maintenance Allocation
156
Introduction
156
General
156
Maintenance Function
156
Column Entries
157
Tool and Test Equipment Requirement
157
Remarks
159
Maintenance Allocation
159
Generator An/Usm-359A
159
Tool and Test Equipment Requirements for Pulse Generator An/Usm-359A
160
Appendix F Expendable Supplies and Materials List Introduction
161
Scope
161
Explanation of Columns
161
Expendable Supplies and Materials
162
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Tektronix PG 508 Specifications
General
Output Waveform
Pulse
Duty Cycle
Variable
Output Impedance
50 Ω
Modes
Continuous, Triggered, Gated
Trigger Output
Yes
Polarity
Positive or Negative