JTAG
Vivado
®
design tools, Xilinx
®
SDK, or third-party tools can establish a JTAG connecon to the
Spartan-7 device through the FTDI FT4232 USB-to-JTAG/USB UART device (U6) connected to
the micro-USB connector (J5).
To use the JTAG pod cable with the FTDI used for the UART only on J5, remove the jumper from
J38 when using the PC4/USB cable for JTAG.
To use the FPGA programming tools to detect the JTAG chain and program the FPGA, connect
the PC4/USB JTAG pod at cable to the 2x7 2 mm keyed shrouded connector J3.
Quad SPI
To boot from the QSPI nonvolale conguraon memory, use the following procedure:
1. Store a valid Spartan-7 boot image in the SPI ash device. See the 7 Series FPGAs
Conguraon User Guide (UG470) for informaon on programming the SPI.
2. Set the boot mode pins SW13 [4:2] MODE[2:0] as indicated in the table in Spartan-7 Device
Conguraon for Master SPI.
3. Power-cycle the SP701 board. SW13 is callout 30 in Board Components.
Chapter 2: Board Setup and Configuration
UG1319 (v1.0) July 12, 2019 www.xilinx.com
SP701 Board User Guide 14