Xilinx Virtex-5 LXT User Manual

26 www.xilinx.com Virtex-5 LXT/SXT/FXT FPGA Prototype Platform
UG229 (v3.0.1) May 21, 2008
Detailed Description
R
21. BPI Interface
The BPI interface is a x16 asynchronous bus configuration. The BPI device is a 256-Mb Intel
Strata Flash (U18), part number JS28F256P30. Table 13 shows the pin mapping from the
BPI device to the FPGA.
Table 13: BPI Pins
Label
Pin Number For Package Type
FF665 FF1136 FF1738
DQ0 AA15 AD19 AJ26
DQ1 Y15 AE19 AK27
DQ2 W14 AE17 AM14
DQ3 Y13 AF16 AN14
DQ4 W16 AD20 AK29
DQ5 Y16 AE21 AK28
DQ6 AA14 AE16 AP13
DQ7 AA13 AF15 AN13
DQ8 AB12 AH13 AL16
DQ9 AC11 AH14 AL15
DQ10 AB20 AH19 AP28
DQ11 AB21 AH20 AN29
DQ12 AB11 AG13 AL17
DQ13 AB10 AH12 AK17
DQ14 AA20 AH22 AP30
DQ15 Y21 AG22 AN30
A1 H9 K12 P13
A2 G10 K13 N13
A3 H21 H23 M29
A4 G20 G23 N30
A5 H11 H12 M13
A6 G11 J12 M14
A7 H19 K22 N29
A8 H18 K23 N28
A9 G12 K14 N14
A10 F13 L14 N15
A11 G19 H22 P28

Xilinx Virtex-5 LXT Specifications

General

Brand	Xilinx
Model	Virtex-5 LXT
Category	Microcontrollers
Language	English