HP 3575A User Manual

Model
35 75A
.1-40.
The iiltereJ
Jc output
voltage
from
the
phase
Detectors
is ippiied
ilircctl].
to tluee
threshold
detectors.
IC6
throush
IC\.
Tlie outputs
of
these
threc
threshold
detectt'rs.
dc'!irni]led
\1'.
T and
p'are
listed
and
defined
i[
Table
-1-1.
Th..se
rhr.'shold
detector outputs
are used
to
control
l\\o
Sel R!'sel
flip flops
which
serve
as storage
elemenrs.
The
ourpurs
of
the twr)
storage
elements (desig,
nated
\1s.
lli
.
PS
tnd Pr')
along
with
T, and
e,are
further
used
to conlrr)l
rhe \
lnd Y
current
sinks.
.
n
each
case,
the
positive
and neqative
lrreshotcts
differ
by approximatety
0.2 Vdc
due 1o hvsteresis.
4-41.
Beforc
proueeding
with
the functional
des.ription,
it
would bc \!.ell
to revie\!
the
operrtion
of
NAND
gates
and
NOR
gatr's
*hich
are us.d
e\tcnsively
in the
phase
Control
Logic
circuitry.
Thr'se
Sates
are
shorvn
in Figure
,1-7
aiong
with tlreir respc.tive
lrLrth
tablcs.
4-41.
In nrost
.asc\. it
is easier
to understand
logic ii
it is
expresscd
in rernrs
of
i\\D/OR
functions
rather
than
NAND/\OR
fun!tions.
For example,
thc X
cu[ent
sink
Section
lV
(Figure
.1,6)
is
gated
on
when
the
output
of IC5C
(X.)
is
19."
-J!-U--L1-controlled
by thi
lugic
equarion
X'=
Q
+
Nls
+
T
Ps'.
Since
the X
current
sink is
gaied
on
rvhen
X'= 0.
it can
be inyerscly
stated that
the
i current
sinJ<
is
gated
on
when
X=
l;where:
X=e+Ms+T.ps,.
The
X
current
sink
is then
gated
on when
e
=
1
On
rvnJn
\l\=
I
OR
r',lrcr
I
ANtl Ps'=
l.
Likewise.
rhe
y
(urrenl
sirr.k
r.
grreJ ,,rr
rvlten
rhc
outpLrl
uf I(
)B
ty.l
is
low;
wherc:
Y
=
lU\ +
Q'
T.Ps'.
Inversely,
y
=
Ms
+
e..T.ps,
and
the,-Y
current
sink
is
gated
on
when
N1"=
1 OR rvhin
e,
AND
T
AND Pr'=
1.
4-43. When
the
phase
rnagnitude
is less
than
90
degrees,
the
"M"
and
"P"
storagc elements
are held
in the resei
oondition
by
Q'which
is
in a low
state. With
both flip flops
ir
the
resel
conJiriun.
l\1.
= U, l\1.
.t.
p..=0
rnJ
i^
=
t.
Since
lhe
Q'
input
r,,
N
fiD
grrc
l(
:C
ii 1.,w.
rhe,,'urput
ol this
gate
is high.
This causcs
thc output
of NOR
gate
lC5(
(X')
to
J.,
lL,w
anJ rlrc
\ rurrelt
sillk
to i.rrrrl,rtr
\\4renevcr
Q'
is low.
the output
of
NAND
gate
IC3D
is
high
and
the output
of
NOR
gatc
lC5A
is
low.
Sincc
M. and
tie
output
of
IC5A
are
,1)ll low,
thc output
of IC5B
(y')
is
Irigh
causiog
the
Y
cufient
sillk to
cut c,ff.
Thus.
whel ihe
phase
rnagnitude
is lcss
than 90
degrees
(e=
l).
the X
rurrcrrr
sinL is trrr
lIld the
Y.urrent
sini<
is off.
4-44.
With
the
phase
differcnce
of
+
I
l0 d%rees
applied
to
the inputs,
Q
goes
low,
B channel is
invertcd.
and tlie
ohase
differcnoe
applied
to thc Phase
Detectors
is
-
(r0
degrees.
In
this casc,
both current
sinls
are initially
turned
off and
the
output
of the Phase
Detectors
drops
toward
-
2.4 Vdc.
This
conditior)
is
sensed
by the
"M,'
thteshold
detector
causing
M'to go
high.
Since
M' anrl
e'are
both high,
a sei
commancl
is
applied to
the
,,M"
storage
element
causing
Ms
to go
high.
\\,hen
Ms
= l, both current
sinks
are
gaterJ
on
and
the phasc
detector
output
is ollset
by
+3.6Vdc
(-
2.4
V +3.6
V= +
l.l Vdc).
During
the
tralsition.
the
pha.e
output
v.-,ltage
becurrres
l,,re
pusilir
e th,rn
-
I .o
Vdc,
l\l'
goes
low
and
l\1! is retaincd
by the
,.M,.
storage element.
As
thc voltagc
rises
above
-
0.2 Vdc,
however,
T,
goes
low,
T
goes
high
and the
"l\'1"
storage elernent
is
resei.
The
X
ouffent
sink rernains
on
bocause
T' and
p"
are
both low
causing
the output
of IC5D
to
go
high
and
the output
of
1C5C (X')
to
go
low.
The
y
current
sink remains
oll
because
Q'and
P"'are
both
high
causing rhe
output
oi
lC3D
to
go
low rvhich,
along
with
T', causes
the output
of lC5A
to
[o
high
and the output
of
lC5B (11)
to
go
low.
A correit
pirase
rcading
of +
120
degrees (+
1.2 Vdc)
is,
therefore,
ilaintained
by
the
X
and
y
current
sinks.
The
phase
Clontrol
Logic
opcrates
in the
samc
manner for
al.l
positive
phase
diffcrcnces greatcr
thar
+90
dcgrees
and leis
than
+
l9l
dcgrees.
,1-45.
Il
the
phase
reading
exceeds +
192
degrees
(+
l.9l Vdc),
the output
of
the
..p"
thrcshold
detector
goes
bw
(P
=
I
,
Q'
=
1)
and a sct command
is applied
to the:,p,,
storage
elemert.
'Ihis
causes
both
currcnt
sints
to cut-off
and
the
phase
reading
becomes
-
168
degrees
(
l.6g
Vdc).
As the plrase
output
vollage
(r,)sses
lhrougi
-0.4
Vdc
in a
negatiye
diroction,
the
"P"
storage element
is reset
by
T,
Table
4-2.
Threshold
Detector
Outpurs.
Goes high
(1)
when
phase
output
vottdgc
b.co..es
more
negEtave
than
-1.92
Vdcj
goes
tow
(0)
as
phase
output
voltage
be,
comes.nor-. positive
than
-
1.7 Vdc*.
Goes
nrqh
when phase
output
voltage
be-
cor-os
more negative
rhan
.04Vdc;
goes
or,
as
phase
output
voltage
becomes
more
positrve
than
02Vdc'.
Goes
olv
when
phase
output
voltage
be-
posirive
than
+
1.92 Vdc;
Soes
hilh
when phase
outpur
vottage
becomes
nore neg€tive
rhan
+
1_7 Vdc*.
NA\O
NOR
B
c
AB
C
O
A8 C O
0001
0010
0100
0t
l0
1000
l0l0
1t
00
l1t0
Figure
4.7
. Logic
Gates.
4-7

HP 3575A Specifications

General

Brand	HP
Model	3575A
Category	Measuring Instruments
Language	English