Folders Files
hdmi_rx •
/hdmi_rx.qsys (Intel Quartus Prime Standard Edition)
•
/hdmi_rx.ip (Intel Quartus Prime Pro Edition)
/hdmi_rx.sopcinfo (Intel Quartus Prime Standard Edition)
hdmi_tx •
/hdmi_tx.qsys (Intel Quartus Prime Standard Edition)
•
/hdmi_tx.ip (Intel Quartus Prime Pro Edition)
/hdmi_tx.sopcinfo (Intel Quartus Prime Standard Edition)
Table 3. Generated Software Files
Folders Files
tx_control_src
Note: The tx_control folder will also
contain duplicates of these files.
/i2c.c
/i2c.h
/main.c
/xcvr_gpll_rcfg.c
/xcvr_gpll_rcfg.h
1.2 Hardware and Software Requirements
Intel uses the following hardware and software to test the design example.
Hardware
• Intel Arria 10 GX FPGA Development Kit
• HDMI Source (Graphics Processor Unit (GPU))
• HDMI Sink (Monitor)
• Bitec HDMI 2.0 FMC daughter card (Revision 4.0)
• HDMI cables
Software
• Intel Quartus Prime version 17.1 (for hardware testing)
• ModelSim* - Intel FPGA Edition, ModelSim - Intel FPGA Edition Starter Edition,
NCSim (Verilog HDL only), Riviera-Pro, or VCS/VCS-MX simulator
1.3 Generating the Design
Use the Intel FPGA HDMI parameter editor in the Intel Quartus Prime software to
generate the design examples.
Figure 3. Generating the Design Flow
Start Parameter
Editor
Specify IP Variation
and Select Device
Select
Design Parameters
Initiate
Design Generation
Specify
Example Design
1 Intel
®
FPGA HDMI Design Example Quick Start Guide for Intel
®
Arria
®
10 Devices
UG-20077 | 2017.11.06
Intel
®
FPGA HDMI Design Example User Guide for Intel
®
Arria 10 Devices
7