Intel Arria 10 series User Manual

Simulator Working Directory Instructions
ModelSim
/simulation/mentor
In the command line, type
vsim -c -do mentor.do
VCS
/simulation/synopsys/vcs
In the command line, type
source vcs_sim.sh
VCS-MX
/simulation/synopsys/
vcsmx
In the command line, type
source vcsmx_sim.sh
A successful simulation ends with the following message:
# SYMBOLS_PER_CLOCK = 2
# VIC = 0
# AUDIO_CLK_DIVIDE = 800
# TEST_HDMI_6G = 1
# Simulation pass
1.5 Compiling and Testing the Design
Compile Design
in Quartus Prime
Software
Set Up Hardware Program Device
Test Design
in Hardware
To compile and run a demonstration test on the hardware example design, follow
these steps:
1. Ensure hardware example design generation is complete.
2. Launch the Intel Quartus Prime software and open project directory/quartus/
a10_hdmi2_demo.qpf.
3.
Click Processing ➤ Start Compilation.
4.
After successful compilation, a .sof file will be generated in your specified
directory.
5. Connect to the on-board FMCB (J2) Bitec HDMI 2.0 FMC Daughter Card Rev 4.
6. Connect TX (P1) of the Bitec HDMI 2.0 FMC Daughter Card (Revision 4) to an
external video source.
7. Connect RX (P2) of the Bitec HDMI 2.0 FMC Daughter Card (Revision 4) to an
external video sink or video analyzer.
8. Ensure all switches on the development board are in default position.
9. Configure the selected Intel Arria 10 device on the development board using the
generated .sof file (Tools ➤ Programmer ).
10. The analyzer should display the video generated from the source.
Related Links
Intel Arria 10 FPGA Development Kit User Guide
1 Intel
®
FPGA HDMI Design Example Quick Start Guide for Intel
®
Arria
®
10 Devices
UG-20077 | 2017.11.06
Intel
®
FPGA HDMI Design Example User Guide for Intel
®
Arria 10 Devices
9

Intel Arria 10 series Specifications

General

Family	Arria 10
Manufacturer	Intel
Transceiver Data Rate	Up to 17.4 Gbps
Core Voltage	0.9 V
Process Technology	20 nm
Category	FPGA
Package Options	FBGA
ALMs	42, 720 - 427, 200
Operating Temperature	0°C to +85°C (Commercial), -40°C to +100°C (Industrial), -55°C to +125°C (Extended)

Summary

Intel FPGA HDMI Design Example Quick Start Guide

Directory Structure

Details the directories containing the generated files for the Intel FPGA HDMI design example.

Hardware and Software Requirements

Generating the Design

Simulating the Design

Compiling and Testing the Design

Design Limitation

Intel FPGA HDMI Design Example Parameters

Intel FPGA HDMI Design Example Detailed Description

HDMI RX-TX Retransmit Design Example

Demonstrates parallel loopback on simplex channel mode for the Intel FPGA HDMI IP core.

Design Components

Dynamic Range and Mastering (HDR) InfoFrame Insertion and Filtering

Clocking Scheme

Interface Signals

Design RTL Parameters

Hardware Setup

Simulation Testbench

Arria 10 Devices Archives

Revision History