Intel i960 Series User Manual

THEORY OF OPERATION A
4-4
Figure 4-1. I/O Control State Machine
4.4.3 Data Path
Data signals are buffered before connecting directly to I/O devices and peripherals. The lower eight data
signals are passed through a 74ABT245 transceiver before connecting to peripherals or I/O devices.
Peripheral I/O address lines are buffered through 74FCT244’s. BE0
, BE1 and A2 are buffered to
become IOA0, IOA1 and IOA2, respectively. These address lines are then used for peripheral device
control such as the serial port and timer.
Idle
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
/
s
e
l
c
i
o
*
c
i
o
t
r
c
rd, wr
rd, wr, rdyen
rd, rdyen, rdy
If selcio set ciotrc
ryden
BLAST
/selflash
/selrom
/seluart
/selpp
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr
rd, wr

Intel i960 Series Specifications

General

Brand	Intel
Model	i960 Series
Category	Computer Hardware
Language	English