3-12
MS-6728 ATX Mainboard
Advanced Chipset Features
DRAM Timing Setting...
Press <Enter> and to enter the sub-menu screen.
Configure SDRAM Timing by SPD
Selects whether DRAM timing is controlled by the SPD (Serial Presence
Detect) EEPROM on the DRAM module. Setting to Enabled enables the
following fields automatically to be determined by BIOS based on the
configurations on the SPD. Selecting Disabled allows users to configure
these fields manually.
CAS# Latency
This controls the timing delay (in clock cycles) before SDRAM starts
a read command after receiving it. Settings: 2, 2.5, 3 (clocks). 2
MSI Reminds You...
Change these settings only if you are familiar with the chipset.
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