3-12
MS-7033 M-ATX Mainboard
DRAM RAS# Precharge (tRP)
When the DRAM Timing Control is set to [Manual], this field is adjustable. This
setting controls the number of cycles for Row Address Strobe (RAS) to be allowed to
precharge. If insufficient time is allowed for the RAS to accumulate its charge before
DRAM refresh, refreshing may be incomplete and DRAM may fail to retain data. This
item applies only when synchronous DRAM is installed in the system. Setting options:
[2T] to [5T].
Precharge dealy (tRAS)
When the DRAM Timing Control is set to [Manual], this field is adjustable. This
setting determines the time RAS takes to read from and write to a memory cell. Setting
options: [4T] to [9T].
Adjust DDR Memory Frequency
Whenthe DRAM Timing Control is set to [Manual], user can place an artificial
memory clock limit on the system. Please note that memory is prevented from running
faster than this frequency. Setting options: [Auto], [333 MHz], [400 MHz], [533 MHz].
System BIOS Cacheable
Selecting [Enabled] allows caching of the system BIOS ROM at F0000h-FFFFFh, result-
ing in better system performance. However, if any program writes to this memory area,
a system error may result. Setting options: [Enabled], [Disabled].
Video BIOS Cacheable
Selecting [Enabled] allows caching of the video memory (RAM) at A0000h to AFFFFh,
resulting in better video performance. However, if any program writes to this memory
area, a memory access error may result. Setting options: [Disabled], [Enabled].
Memory Hole
In order to improve performance, certain space in memory can be reserved for ISA
peripherals. This memory must be mapped into the memory space below 16MB. When
this area is reserved, it cannot be cached. Settings: [Disabled], [15MB-16MB].
PCI Express Port Func
Press <Enter> and the following sub-menu appears:
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